aboutsummaryrefslogtreecommitdiff
path: root/hw
diff options
context:
space:
mode:
authorBALATON Zoltan <balaton@eik.bme.hu>2023-07-05 22:12:51 +0200
committerDaniel Henrique Barboza <danielhb413@gmail.com>2023-07-07 04:47:49 -0300
commit088b61bc49fab767d73d79d49cb828d866346e6d (patch)
treeb3a0943e40edec67ce3ccf28e529cb0aa6373633 /hw
parentb5d2ad84a14c1305efd9739d98a6adec0bf42e4d (diff)
downloadqemu-088b61bc49fab767d73d79d49cb828d866346e6d.zip
qemu-088b61bc49fab767d73d79d49cb828d866346e6d.tar.gz
qemu-088b61bc49fab767d73d79d49cb828d866346e6d.tar.bz2
ppc440: Stop using system io region for PCIe buses
Add separate memory regions for the mem and io spaces of the PCIe bus to avoid different buses using the same system io region. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <b631c3a61729eee2166d899b8888164ebeb71574.1688586835.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/ppc/ppc440_uc.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c
index 5724db2..663abf3 100644
--- a/hw/ppc/ppc440_uc.c
+++ b/hw/ppc/ppc440_uc.c
@@ -776,6 +776,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(PPC460EXPCIEState, PPC460EX_PCIE_HOST)
struct PPC460EXPCIEState {
PCIExpressHost parent_obj;
+ MemoryRegion busmem;
MemoryRegion iomem;
qemu_irq irq[4];
int32_t dcrn_base;
@@ -1056,15 +1057,17 @@ static void ppc460ex_pcie_realize(DeviceState *dev, Error **errp)
error_setg(errp, "invalid PCIe DCRN base");
return;
}
+ snprintf(buf, sizeof(buf), "pcie%d-mem", id);
+ memory_region_init(&s->busmem, OBJECT(s), buf, UINT64_MAX);
snprintf(buf, sizeof(buf), "pcie%d-io", id);
- memory_region_init(&s->iomem, OBJECT(s), buf, UINT64_MAX);
+ memory_region_init(&s->iomem, OBJECT(s), buf, 64 * KiB);
for (i = 0; i < 4; i++) {
sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->irq[i]);
}
snprintf(buf, sizeof(buf), "pcie.%d", id);
pci->bus = pci_register_root_bus(DEVICE(s), buf, ppc460ex_set_irq,
- pci_swizzle_map_irq_fn, s, &s->iomem,
- get_system_io(), 0, 4, TYPE_PCIE_BUS);
+ pci_swizzle_map_irq_fn, s, &s->busmem,
+ &s->iomem, 0, 4, TYPE_PCIE_BUS);
ppc460ex_pcie_register_dcrs(s);
}