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authorPeter Maydell <peter.maydell@linaro.org>2019-10-24 09:55:01 +0100
committerPeter Maydell <peter.maydell@linaro.org>2019-10-24 09:55:01 +0100
commitea0ec714d3109e0d0523b9dacb38030e4cb142a8 (patch)
tree47f029bc0f369be749acae99098efa4820d74a0e /hw/xtensa
parentf78398bfe544db81a974825b0a2aa826f6576414 (diff)
parentd9e8553bc8821d72cb72ca95f76b2d8ff6eb628a (diff)
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Merge remote-tracking branch 'remotes/xtensa/tags/20191023-xtensa' into staging
target/xtensa improvements for v4.2: - regenerate and reimport test_mmuhifi_c3 core; - add virt machine. # gpg: Signature made Wed 23 Oct 2019 23:56:42 BST # gpg: using RSA key 2B67854B98E5327DCDEB17D851F9CC91F83FA044 # gpg: issuer "jcmvbkbc@gmail.com" # gpg: Good signature from "Max Filippov <filippov@cadence.com>" [unknown] # gpg: aka "Max Filippov <max.filippov@cogentembedded.com>" [full] # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" [full] # Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044 * remotes/xtensa/tags/20191023-xtensa: hw/xtensa: add virt machine target/xtensa: regenerate and re-import test_mmuhifi_c3 core Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/xtensa')
-rw-r--r--hw/xtensa/Kconfig6
-rw-r--r--hw/xtensa/Makefile.objs1
-rw-r--r--hw/xtensa/sim.c41
-rw-r--r--hw/xtensa/virt.c135
-rw-r--r--hw/xtensa/xtensa_sim.h34
5 files changed, 202 insertions, 15 deletions
diff --git a/hw/xtensa/Kconfig b/hw/xtensa/Kconfig
index d72817d..0740657 100644
--- a/hw/xtensa/Kconfig
+++ b/hw/xtensa/Kconfig
@@ -1,6 +1,12 @@
config XTENSA_SIM
bool
+config XTENSA_VIRT
+ bool
+ select XTENSA_SIM
+ select PCI_EXPRESS_GENERIC_BRIDGE
+ select PCI_DEVICES
+
config XTENSA_XTFPGA
bool
select OPENCORES_ETH
diff --git a/hw/xtensa/Makefile.objs b/hw/xtensa/Makefile.objs
index 0bbfccd..2b40e1b 100644
--- a/hw/xtensa/Makefile.objs
+++ b/hw/xtensa/Makefile.objs
@@ -2,4 +2,5 @@ obj-y += mx_pic.o
obj-y += pic_cpu.o
obj-y += xtensa_memory.o
obj-$(CONFIG_XTENSA_SIM) += sim.o
+obj-$(CONFIG_XTENSA_VIRT) += virt.o
obj-$(CONFIG_XTENSA_XTFPGA) += xtfpga.o
diff --git a/hw/xtensa/sim.c b/hw/xtensa/sim.c
index 981dbb7..a22743a 100644
--- a/hw/xtensa/sim.c
+++ b/hw/xtensa/sim.c
@@ -37,6 +37,7 @@
#include "exec/address-spaces.h"
#include "qemu/error-report.h"
#include "xtensa_memory.h"
+#include "xtensa_sim.h"
static uint64_t translate_phys_addr(void *opaque, uint64_t addr)
{
@@ -52,12 +53,11 @@ static void sim_reset(void *opaque)
cpu_reset(CPU(cpu));
}
-static void xtensa_sim_init(MachineState *machine)
+XtensaCPU *xtensa_sim_common_init(MachineState *machine)
{
XtensaCPU *cpu = NULL;
CPUXtensaState *env = NULL;
ram_addr_t ram_size = machine->ram_size;
- const char *kernel_filename = machine->kernel_filename;
int n;
for (n = 0; n < machine->smp.cpus; n++) {
@@ -89,30 +89,41 @@ static void xtensa_sim_init(MachineState *machine)
xtensa_create_memory_regions(&sysram, "xtensa.sysram",
get_system_memory());
}
-
if (serial_hd(0)) {
xtensa_sim_open_console(serial_hd(0));
}
- if (kernel_filename) {
- uint64_t elf_entry;
- uint64_t elf_lowaddr;
+ return cpu;
+}
+
+void xtensa_sim_load_kernel(XtensaCPU *cpu, MachineState *machine)
+{
+ const char *kernel_filename = machine->kernel_filename;
#ifdef TARGET_WORDS_BIGENDIAN
- int success = load_elf(kernel_filename, NULL,
- translate_phys_addr, cpu,
- &elf_entry, &elf_lowaddr,
- NULL, 1, EM_XTENSA, 0, 0);
+ int big_endian = true;
#else
- int success = load_elf(kernel_filename, NULL,
- translate_phys_addr, cpu,
- &elf_entry, &elf_lowaddr,
- NULL, 0, EM_XTENSA, 0, 0);
+ int big_endian = false;
#endif
+
+ if (kernel_filename) {
+ uint64_t elf_entry;
+ uint64_t elf_lowaddr;
+ int success = load_elf(kernel_filename, NULL, translate_phys_addr, cpu,
+ &elf_entry, &elf_lowaddr, NULL, big_endian,
+ EM_XTENSA, 0, 0);
+
if (success > 0) {
- env->pc = elf_entry;
+ cpu->env.pc = elf_entry;
}
}
}
+static void xtensa_sim_init(MachineState *machine)
+{
+ XtensaCPU *cpu = xtensa_sim_common_init(machine);
+
+ xtensa_sim_load_kernel(cpu, machine);
+}
+
static void xtensa_sim_machine_init(MachineClass *mc)
{
mc->desc = "sim machine (" XTENSA_DEFAULT_CPU_MODEL ")";
diff --git a/hw/xtensa/virt.c b/hw/xtensa/virt.c
new file mode 100644
index 0000000..b22dcf9
--- /dev/null
+++ b/hw/xtensa/virt.c
@@ -0,0 +1,135 @@
+/*
+ * Copyright (c) 2019, Max Filippov, Open Source and Linux Lab.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the Open Source and Linux Lab nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "cpu.h"
+#include "sysemu/reset.h"
+#include "sysemu/sysemu.h"
+#include "hw/boards.h"
+#include "hw/loader.h"
+#include "hw/pci-host/gpex.h"
+#include "net/net.h"
+#include "elf.h"
+#include "exec/memory.h"
+#include "exec/address-spaces.h"
+#include "qemu/error-report.h"
+#include "xtensa_memory.h"
+#include "xtensa_sim.h"
+
+static void create_pcie(CPUXtensaState *env, int irq_base, hwaddr addr_base)
+{
+ hwaddr base_ecam = addr_base + 0x00100000;
+ hwaddr size_ecam = 0x03f00000;
+ hwaddr base_pio = addr_base + 0x00000000;
+ hwaddr size_pio = 0x00010000;
+ hwaddr base_mmio = addr_base + 0x04000000;
+ hwaddr size_mmio = 0x08000000;
+
+ MemoryRegion *ecam_alias;
+ MemoryRegion *ecam_reg;
+ MemoryRegion *pio_alias;
+ MemoryRegion *pio_reg;
+ MemoryRegion *mmio_alias;
+ MemoryRegion *mmio_reg;
+
+ DeviceState *dev;
+ PCIHostState *pci;
+ qemu_irq *extints;
+ int i;
+
+ dev = qdev_create(NULL, TYPE_GPEX_HOST);
+ qdev_init_nofail(dev);
+
+ /* Map only the first size_ecam bytes of ECAM space. */
+ ecam_alias = g_new0(MemoryRegion, 1);
+ ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
+ memory_region_init_alias(ecam_alias, OBJECT(dev), "pcie-ecam",
+ ecam_reg, 0, size_ecam);
+ memory_region_add_subregion(get_system_memory(), base_ecam, ecam_alias);
+
+ /*
+ * Map the MMIO window into system address space so as to expose
+ * the section of PCI MMIO space which starts at the same base address
+ * (ie 1:1 mapping for that part of PCI MMIO space visible through
+ * the window).
+ */
+ mmio_alias = g_new0(MemoryRegion, 1);
+ mmio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1);
+ memory_region_init_alias(mmio_alias, OBJECT(dev), "pcie-mmio",
+ mmio_reg, base_mmio, size_mmio);
+ memory_region_add_subregion(get_system_memory(), base_mmio, mmio_alias);
+
+ /* Map IO port space. */
+ pio_alias = g_new0(MemoryRegion, 1);
+ pio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 2);
+ memory_region_init_alias(pio_alias, OBJECT(dev), "pcie-pio",
+ pio_reg, 0, size_pio);
+ memory_region_add_subregion(get_system_memory(), base_pio, pio_alias);
+
+ /* Connect IRQ lines. */
+ extints = xtensa_get_extints(env);
+
+ for (i = 0; i < GPEX_NUM_IRQS; i++) {
+ void *q = extints[irq_base + i];
+
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, q);
+ gpex_set_irq_num(GPEX_HOST(dev), i, irq_base + i);
+ }
+
+ pci = PCI_HOST_BRIDGE(dev);
+ if (pci->bus) {
+ for (i = 0; i < nb_nics; i++) {
+ NICInfo *nd = &nd_table[i];
+
+ if (!nd->model) {
+ nd->model = g_strdup("virtio");
+ }
+
+ pci_nic_init_nofail(nd, pci->bus, nd->model, NULL);
+ }
+ }
+}
+
+static void xtensa_virt_init(MachineState *machine)
+{
+ XtensaCPU *cpu = xtensa_sim_common_init(machine);
+ CPUXtensaState *env = &cpu->env;
+
+ create_pcie(env, 0, 0xf0000000);
+ xtensa_sim_load_kernel(cpu, machine);
+}
+
+static void xtensa_virt_machine_init(MachineClass *mc)
+{
+ mc->desc = "virt machine (" XTENSA_DEFAULT_CPU_MODEL ")";
+ mc->init = xtensa_virt_init;
+ mc->max_cpus = 32;
+ mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
+}
+
+DEFINE_MACHINE("virt", xtensa_virt_machine_init)
diff --git a/hw/xtensa/xtensa_sim.h b/hw/xtensa/xtensa_sim.h
new file mode 100644
index 0000000..bdc92f3
--- /dev/null
+++ b/hw/xtensa/xtensa_sim.h
@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2019, Max Filippov, Open Source and Linux Lab.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the Open Source and Linux Lab nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef XTENSA_SIM_H
+#define XTENSA_SIM_H
+
+XtensaCPU *xtensa_sim_common_init(MachineState *machine);
+void xtensa_sim_load_kernel(XtensaCPU *cpu, MachineState *machine);
+
+#endif