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authorSai Pavan Boddu <sai.pavan.boddu@xilinx.com>2020-12-04 00:52:36 +0530
committerPeter Maydell <peter.maydell@linaro.org>2020-12-15 12:04:30 +0000
commite29c7db19d2cb71df1c02ba523d0c882009a78ec (patch)
tree030fd411418bacfeeae6838b017f5fa333a96093 /hw/usb
parent8bbe61f3c10446603514aeee0aafebaaa00e8d07 (diff)
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usb: xlnx-usb-subsystem: Add xilinx usb subsystem
This model is a top level integration wrapper for hcd-dwc3 and versal-usb2-ctrl-regs modules, this is used by xilinx versal soc's and future xilinx usb subsystems would also be part of it. Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1607023357-5096-4-git-send-email-sai.pavan.boddu@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/usb')
-rw-r--r--hw/usb/Kconfig5
-rw-r--r--hw/usb/meson.build1
-rw-r--r--hw/usb/xlnx-usb-subsystem.c94
3 files changed, 100 insertions, 0 deletions
diff --git a/hw/usb/Kconfig b/hw/usb/Kconfig
index 56da78a..40093d7 100644
--- a/hw/usb/Kconfig
+++ b/hw/usb/Kconfig
@@ -117,3 +117,8 @@ config USB_DWC3
bool
select USB_XHCI_SYSBUS
select REGISTER
+
+config XLNX_USB_SUBSYS
+ bool
+ default y if XLNX_VERSAL
+ select USB_DWC3
diff --git a/hw/usb/meson.build b/hw/usb/meson.build
index 433c27e..f46c6b6 100644
--- a/hw/usb/meson.build
+++ b/hw/usb/meson.build
@@ -32,6 +32,7 @@ softmmu_ss.add(when: 'CONFIG_TUSB6010', if_true: files('tusb6010.c'))
softmmu_ss.add(when: 'CONFIG_IMX', if_true: files('chipidea.c'))
softmmu_ss.add(when: 'CONFIG_IMX_USBPHY', if_true: files('imx-usb-phy.c'))
specific_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal-usb2-ctrl-regs.c'))
+specific_ss.add(when: 'CONFIG_XLNX_USB_SUBSYS', if_true: files('xlnx-usb-subsystem.c'))
# emulated usb devices
softmmu_ss.add(when: 'CONFIG_USB', if_true: files('dev-hub.c'))
diff --git a/hw/usb/xlnx-usb-subsystem.c b/hw/usb/xlnx-usb-subsystem.c
new file mode 100644
index 0000000..5682573
--- /dev/null
+++ b/hw/usb/xlnx-usb-subsystem.c
@@ -0,0 +1,94 @@
+/*
+ * QEMU model of the Xilinx usb subsystem
+ *
+ * Copyright (c) 2020 Xilinx Inc. Sai Pavan Boddu <sai.pava.boddu@xilinx.com>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "qemu/osdep.h"
+#include "hw/sysbus.h"
+#include "hw/irq.h"
+#include "hw/register.h"
+#include "qemu/bitops.h"
+#include "qemu/log.h"
+#include "qom/object.h"
+#include "qapi/error.h"
+#include "hw/qdev-properties.h"
+#include "hw/usb/xlnx-usb-subsystem.h"
+
+static void versal_usb2_realize(DeviceState *dev, Error **errp)
+{
+ VersalUsb2 *s = VERSAL_USB2(dev);
+ SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
+ Error *err = NULL;
+
+ sysbus_realize(SYS_BUS_DEVICE(&s->dwc3), &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+ sysbus_realize(SYS_BUS_DEVICE(&s->usb2Ctrl), &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+ sysbus_init_mmio(sbd, &s->dwc3_mr);
+ sysbus_init_mmio(sbd, &s->usb2Ctrl_mr);
+ qdev_pass_gpios(DEVICE(&s->dwc3.sysbus_xhci), dev, SYSBUS_DEVICE_GPIO_IRQ);
+}
+
+static void versal_usb2_init(Object *obj)
+{
+ VersalUsb2 *s = VERSAL_USB2(obj);
+
+ object_initialize_child(obj, "versal.dwc3", &s->dwc3,
+ TYPE_USB_DWC3);
+ object_initialize_child(obj, "versal.usb2-ctrl", &s->usb2Ctrl,
+ TYPE_XILINX_VERSAL_USB2_CTRL_REGS);
+ memory_region_init_alias(&s->dwc3_mr, obj, "versal.dwc3_alias",
+ &s->dwc3.iomem, 0, DWC3_SIZE);
+ memory_region_init_alias(&s->usb2Ctrl_mr, obj, "versal.usb2Ctrl_alias",
+ &s->usb2Ctrl.iomem, 0, USB2_REGS_R_MAX * 4);
+ qdev_alias_all_properties(DEVICE(&s->dwc3), obj);
+ qdev_alias_all_properties(DEVICE(&s->dwc3.sysbus_xhci), obj);
+ object_property_add_alias(obj, "dma", OBJECT(&s->dwc3.sysbus_xhci), "dma");
+}
+
+static void versal_usb2_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ dc->realize = versal_usb2_realize;
+}
+
+static const TypeInfo versal_usb2_info = {
+ .name = TYPE_XILINX_VERSAL_USB2,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(VersalUsb2),
+ .class_init = versal_usb2_class_init,
+ .instance_init = versal_usb2_init,
+};
+
+static void versal_usb_types(void)
+{
+ type_register_static(&versal_usb2_info);
+}
+
+type_init(versal_usb_types)