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authorAndreas Färber <andreas.faerber@web.de>2013-06-06 15:41:11 +0200
committerGerd Hoffmann <kraxel@redhat.com>2013-06-24 08:23:10 +0200
commit20c570432e995313874eaeabc3d0251dab40e16f (patch)
tree4fddf2cff81965cf52d30cd5fce1ebe8d91419bf /hw/usb
parentd4614cc3121b3c6375a63d01947779e36149c68c (diff)
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usb/hcd-ehci: Add Tegra2 SysBus EHCI device
This prepares an EHCI device for the Nvidia Tegra2 SoC family. Values based on patch by Vincent Palatin and verified against TRM v01p. Cc: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Diffstat (limited to 'hw/usb')
-rw-r--r--hw/usb/hcd-ehci-sysbus.c15
-rw-r--r--hw/usb/hcd-ehci.h1
2 files changed, 16 insertions, 0 deletions
diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw/usb/hcd-ehci-sysbus.c
index e450137..68667b5 100644
--- a/hw/usb/hcd-ehci-sysbus.c
+++ b/hw/usb/hcd-ehci-sysbus.c
@@ -104,11 +104,26 @@ static const TypeInfo ehci_exynos4210_type_info = {
.class_init = ehci_exynos4210_class_init,
};
+static void ehci_tegra2_class_init(ObjectClass *oc, void *data)
+{
+ SysBusEHCIClass *sec = SYS_BUS_EHCI_CLASS(oc);
+
+ sec->capsbase = 0x100;
+ sec->opregbase = 0x140;
+}
+
+static const TypeInfo ehci_tegra2_type_info = {
+ .name = TYPE_TEGRA2_EHCI,
+ .parent = TYPE_SYS_BUS_EHCI,
+ .class_init = ehci_tegra2_class_init,
+};
+
static void ehci_sysbus_register_types(void)
{
type_register_static(&ehci_type_info);
type_register_static(&ehci_xlnx_type_info);
type_register_static(&ehci_exynos4210_type_info);
+ type_register_static(&ehci_tegra2_type_info);
}
type_init(ehci_sysbus_register_types)
diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h
index 7a93957..2c03e8f 100644
--- a/hw/usb/hcd-ehci.h
+++ b/hw/usb/hcd-ehci.h
@@ -339,6 +339,7 @@ typedef struct EHCIPCIState {
#define TYPE_SYS_BUS_EHCI "sysbus-ehci-usb"
#define TYPE_EXYNOS4210_EHCI "exynos4210-ehci-usb"
+#define TYPE_TEGRA2_EHCI "tegra2-ehci-usb"
#define SYS_BUS_EHCI(obj) \
OBJECT_CHECK(EHCISysBusState, (obj), TYPE_SYS_BUS_EHCI)