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authorPhilippe Mathieu-Daudé <philmd@redhat.com>2020-09-03 10:08:29 +0200
committerPhilippe Mathieu-Daudé <philmd@redhat.com>2021-12-30 17:16:32 +0100
commitba06fe8add5b788956a7317246c6280dfc157040 (patch)
treeac45cbe188581ffab75d060e0eec843515f8ec32 /hw/usb/hcd-xhci.c
parent23faf5694ff8054b847e9733297727be4a641132 (diff)
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dma: Let dma_memory_read/write() take MemTxAttrs argument
Let devices specify transaction attributes when calling dma_memory_read() or dma_memory_write(). Patch created mechanically using spatch with this script: @@ expression E1, E2, E3, E4; @@ ( - dma_memory_read(E1, E2, E3, E4) + dma_memory_read(E1, E2, E3, E4, MEMTXATTRS_UNSPECIFIED) | - dma_memory_write(E1, E2, E3, E4) + dma_memory_write(E1, E2, E3, E4, MEMTXATTRS_UNSPECIFIED) ) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Li Qiang <liq3ea@gmail.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20211223115554.3155328-6-philmd@redhat.com>
Diffstat (limited to 'hw/usb/hcd-xhci.c')
-rw-r--r--hw/usb/hcd-xhci.c18
1 files changed, 11 insertions, 7 deletions
diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c
index e017000..ed2b9ea 100644
--- a/hw/usb/hcd-xhci.c
+++ b/hw/usb/hcd-xhci.c
@@ -487,7 +487,7 @@ static inline void xhci_dma_read_u32s(XHCIState *xhci, dma_addr_t addr,
assert((len % sizeof(uint32_t)) == 0);
- dma_memory_read(xhci->as, addr, buf, len);
+ dma_memory_read(xhci->as, addr, buf, len, MEMTXATTRS_UNSPECIFIED);
for (i = 0; i < (len / sizeof(uint32_t)); i++) {
buf[i] = le32_to_cpu(buf[i]);
@@ -507,7 +507,7 @@ static inline void xhci_dma_write_u32s(XHCIState *xhci, dma_addr_t addr,
for (i = 0; i < n; i++) {
tmp[i] = cpu_to_le32(buf[i]);
}
- dma_memory_write(xhci->as, addr, tmp, len);
+ dma_memory_write(xhci->as, addr, tmp, len, MEMTXATTRS_UNSPECIFIED);
}
static XHCIPort *xhci_lookup_port(XHCIState *xhci, struct USBPort *uport)
@@ -618,7 +618,7 @@ static void xhci_write_event(XHCIState *xhci, XHCIEvent *event, int v)
ev_trb.status, ev_trb.control);
addr = intr->er_start + TRB_SIZE*intr->er_ep_idx;
- dma_memory_write(xhci->as, addr, &ev_trb, TRB_SIZE);
+ dma_memory_write(xhci->as, addr, &ev_trb, TRB_SIZE, MEMTXATTRS_UNSPECIFIED);
intr->er_ep_idx++;
if (intr->er_ep_idx >= intr->er_size) {
@@ -679,7 +679,8 @@ static TRBType xhci_ring_fetch(XHCIState *xhci, XHCIRing *ring, XHCITRB *trb,
while (1) {
TRBType type;
- dma_memory_read(xhci->as, ring->dequeue, trb, TRB_SIZE);
+ dma_memory_read(xhci->as, ring->dequeue, trb, TRB_SIZE,
+ MEMTXATTRS_UNSPECIFIED);
trb->addr = ring->dequeue;
trb->ccs = ring->ccs;
le64_to_cpus(&trb->parameter);
@@ -726,7 +727,8 @@ static int xhci_ring_chain_length(XHCIState *xhci, const XHCIRing *ring)
while (1) {
TRBType type;
- dma_memory_read(xhci->as, dequeue, &trb, TRB_SIZE);
+ dma_memory_read(xhci->as, dequeue, &trb, TRB_SIZE,
+ MEMTXATTRS_UNSPECIFIED);
le64_to_cpus(&trb.parameter);
le32_to_cpus(&trb.status);
le32_to_cpus(&trb.control);
@@ -781,7 +783,8 @@ static void xhci_er_reset(XHCIState *xhci, int v)
xhci_die(xhci);
return;
}
- dma_memory_read(xhci->as, erstba, &seg, sizeof(seg));
+ dma_memory_read(xhci->as, erstba, &seg, sizeof(seg),
+ MEMTXATTRS_UNSPECIFIED);
le32_to_cpus(&seg.addr_low);
le32_to_cpus(&seg.addr_high);
le32_to_cpus(&seg.size);
@@ -2397,7 +2400,8 @@ static TRBCCode xhci_get_port_bandwidth(XHCIState *xhci, uint64_t pctx)
/* TODO: actually implement real values here */
bw_ctx[0] = 0;
memset(&bw_ctx[1], 80, xhci->numports); /* 80% */
- dma_memory_write(xhci->as, ctx, bw_ctx, sizeof(bw_ctx));
+ dma_memory_write(xhci->as, ctx, bw_ctx, sizeof(bw_ctx),
+ MEMTXATTRS_UNSPECIFIED);
return CC_SUCCESS;
}