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authorBlue Swirl <blauwirbel@gmail.com>2011-09-17 20:30:50 +0000
committerBlue Swirl <blauwirbel@gmail.com>2011-09-27 19:16:46 +0000
commit46f3069cba94aab44b3b4f87bc270759b4a700fa (patch)
tree6f9073a78aaa91f42a559116ec63205d57124866 /hw/unin_pci.c
parent3b7653ac48e6d1edfa4ae2496dbefbe422a94eb6 (diff)
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PPC: use memory API to construct the PCI hole
Avoid vga.chain4 mapping by constructing a PCI hole for upper 2G of the PCI space. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'hw/unin_pci.c')
-rw-r--r--hw/unin_pci.c18
1 files changed, 16 insertions, 2 deletions
diff --git a/hw/unin_pci.c b/hw/unin_pci.c
index 600cd1e..4299052 100644
--- a/hw/unin_pci.c
+++ b/hw/unin_pci.c
@@ -41,6 +41,8 @@ static const int unin_irq_line[] = { 0x1b, 0x1c, 0x1d, 0x1e };
typedef struct UNINState {
SysBusDevice busdev;
PCIHostState host_state;
+ MemoryRegion pci_mmio;
+ MemoryRegion pci_hole;
} UNINState;
static int pci_unin_map_irq(PCIDevice *pci_dev, int irq_num)
@@ -215,10 +217,16 @@ PCIBus *pci_pmac_init(qemu_irq *pic,
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
d = FROM_SYSBUS(UNINState, s);
+ memory_region_init(&d->pci_mmio, "pci-mmio", 0x100000000ULL);
+ memory_region_init_alias(&d->pci_hole, "pci-hole", &d->pci_mmio,
+ 0x80000000ULL, 0x70000000ULL);
+ memory_region_add_subregion(address_space_mem, 0x80000000ULL,
+ &d->pci_hole);
+
d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci",
pci_unin_set_irq, pci_unin_map_irq,
pic,
- address_space_mem,
+ &d->pci_mmio,
address_space_io,
PCI_DEVFN(11, 0), 4);
@@ -272,10 +280,16 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic,
s = sysbus_from_qdev(dev);
d = FROM_SYSBUS(UNINState, s);
+ memory_region_init(&d->pci_mmio, "pci-mmio", 0x100000000ULL);
+ memory_region_init_alias(&d->pci_hole, "pci-hole", &d->pci_mmio,
+ 0x80000000ULL, 0x70000000ULL);
+ memory_region_add_subregion(address_space_mem, 0x80000000ULL,
+ &d->pci_hole);
+
d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci",
pci_unin_set_irq, pci_unin_map_irq,
pic,
- address_space_mem,
+ &d->pci_mmio,
address_space_io,
PCI_DEVFN(11, 0), 4);