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| author | BALATON Zoltan <balaton@eik.bme.hu> | 2021-10-29 23:02:09 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-10-30 18:39:37 +0200 |
| commit | ad52cfc13750662fd003565e8035bb8ffbd4f0ef (patch) | |
| tree | ee86a97c02ce074a2a2996df05501a9dc2ce8511 /hw/timer | |
| parent | 3b885dabd09f449143adbfc0595896b47648673d (diff) | |
| download | qemu-ad52cfc13750662fd003565e8035bb8ffbd4f0ef.zip qemu-ad52cfc13750662fd003565e8035bb8ffbd4f0ef.tar.gz qemu-ad52cfc13750662fd003565e8035bb8ffbd4f0ef.tar.bz2 | |
hw/sh4: Change debug printfs to traces
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <b776043e811ab3caf200515e1350bdcccd1cc47b.1635541329.git.balaton@eik.bme.hu>
[PMD: Fixed format strings for 32-bit hosts]
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'hw/timer')
| -rw-r--r-- | hw/timer/sh_timer.c | 22 | ||||
| -rw-r--r-- | hw/timer/trace-events | 5 |
2 files changed, 9 insertions, 18 deletions
diff --git a/hw/timer/sh_timer.c b/hw/timer/sh_timer.c index cc7c189..e1b6145 100644 --- a/hw/timer/sh_timer.c +++ b/hw/timer/sh_timer.c @@ -15,8 +15,7 @@ #include "hw/sh4/sh.h" #include "hw/timer/tmu012.h" #include "hw/ptimer.h" - -//#define DEBUG_TIMER +#include "trace.h" #define TIMER_TCR_TPSC (7 << 0) #define TIMER_TCR_CKEG (3 << 3) @@ -203,10 +202,7 @@ static void sh_timer_start_stop(void *opaque, int enable) { sh_timer_state *s = (sh_timer_state *)opaque; -#ifdef DEBUG_TIMER - printf("sh_timer_start_stop %d (%d)\n", enable, s->enabled); -#endif - + trace_sh_timer_start_stop(enable, s->enabled); ptimer_transaction_begin(s->timer); if (s->enabled && !enable) { ptimer_stop(s->timer); @@ -216,10 +212,6 @@ static void sh_timer_start_stop(void *opaque, int enable) } ptimer_transaction_commit(s->timer); s->enabled = !!enable; - -#ifdef DEBUG_TIMER - printf("sh_timer_start_stop done %d\n", s->enabled); -#endif } static void sh_timer_tick(void *opaque) @@ -269,10 +261,7 @@ static uint64_t tmu012_read(void *opaque, hwaddr offset, { tmu012_state *s = (tmu012_state *)opaque; -#ifdef DEBUG_TIMER - printf("tmu012_read 0x%lx\n", (unsigned long) offset); -#endif - + trace_sh_timer_read(offset); if (offset >= 0x20) { if (!(s->feat & TMU012_FEAT_3CHAN)) { hw_error("tmu012_write: Bad channel offset %x\n", (int)offset); @@ -302,10 +291,7 @@ static void tmu012_write(void *opaque, hwaddr offset, { tmu012_state *s = (tmu012_state *)opaque; -#ifdef DEBUG_TIMER - printf("tmu012_write 0x%lx 0x%08x\n", (unsigned long) offset, value); -#endif - + trace_sh_timer_write(offset, value); if (offset >= 0x20) { if (!(s->feat & TMU012_FEAT_3CHAN)) { hw_error("tmu012_write: Bad channel offset %x\n", (int)offset); diff --git a/hw/timer/trace-events b/hw/timer/trace-events index d0edcd2..3eccef8 100644 --- a/hw/timer/trace-events +++ b/hw/timer/trace-events @@ -94,3 +94,8 @@ sifive_pwm_set_alarm(uint64_t alarm, uint64_t now) "Setting alarm to: 0x%" PRIx6 sifive_pwm_interrupt(int num) "Interrupt %d" sifive_pwm_read(uint64_t offset) "Read at address: 0x%" PRIx64 sifive_pwm_write(uint64_t data, uint64_t offset) "Write 0x%" PRIx64 " at address: 0x%" PRIx64 + +# sh_timer.c +sh_timer_start_stop(int enable, int current) "%d (%d)" +sh_timer_read(uint64_t offset) "tmu012_read 0x%" PRIx64 +sh_timer_write(uint64_t offset, uint64_t value) "tmu012_write 0x%" PRIx64 " 0x%08" PRIx64 |