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| author | Chalapathi V <chalapathi.v@linux.ibm.com> | 2024-06-26 04:05:27 -0500 |
|---|---|---|
| committer | Nicholas Piggin <npiggin@gmail.com> | 2024-07-26 09:21:06 +1000 |
| commit | bb44dc48628e9168f16c460f778bbef7a91d7708 (patch) | |
| tree | 4e61a8ed6e7f635365757b8497af0ffcbdbd2383 /hw/ssi/pnv_spi.c | |
| parent | 8d970f4162b8a388eef08ee37dab47a650e390ab (diff) | |
| download | qemu-bb44dc48628e9168f16c460f778bbef7a91d7708.zip qemu-bb44dc48628e9168f16c460f778bbef7a91d7708.tar.gz qemu-bb44dc48628e9168f16c460f778bbef7a91d7708.tar.bz2 | |
hw/ppc: SPI controller wiring to P10 chip
In this commit, create SPI controller on p10 chip and connect cs irq.
The QOM tree of pnv-spi and seeprom are.
/machine (powernv10-machine)
/chip[0] (power10_v2.0-pnv-chip)
/pib_spic[2] (pnv-spi)
/pnv-spi-bus.2 (SSI)
/xscom-spi[0] (memory-region)
/machine (powernv10-machine)
/peripheral-anon (container)
/device[0] (25csm04)
/WP#[0] (irq)
/ssi-gpio-cs[0] (irq)
(qemu) qom-get /machine/peripheral-anon /device[76] "parent_bus"
"/machine/chip[0]/pib_spic[2]/pnv-spi-bus.2"
Signed-off-by: Chalapathi V <chalapathi.v@linux.ibm.com>
Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'hw/ssi/pnv_spi.c')
| -rw-r--r-- | hw/ssi/pnv_spi.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/hw/ssi/pnv_spi.c b/hw/ssi/pnv_spi.c index cdff3f9..c1297ab 100644 --- a/hw/ssi/pnv_spi.c +++ b/hw/ssi/pnv_spi.c @@ -1051,9 +1051,17 @@ static void operation_sequencer(PnvSpi *s) static void do_reset(DeviceState *dev) { PnvSpi *s = PNV_SPI(dev); + DeviceState *ssi_dev; trace_pnv_spi_reset(); + /* Connect cs irq */ + ssi_dev = ssi_get_cs(s->ssi_bus, 0); + if (ssi_dev) { + qemu_irq cs_line = qdev_get_gpio_in_named(ssi_dev, SSI_GPIO_CS, 0); + qdev_connect_gpio_out_named(DEVICE(s), "cs", 0, cs_line); + } + /* Reset all N1 and N2 counters, and other constants */ s->N2_bits = 0; s->N2_bytes = 0; |