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authorMarkus Armbruster <armbru@redhat.com>2019-03-08 10:46:04 +0100
committerMarkus Armbruster <armbru@redhat.com>2019-03-11 22:53:44 +0100
commit8468713412b1eb0d24d605bf97d159a9b01d4b02 (patch)
tree388cd087903e84ddb103d5f4dcb1183e98182b9d /hw/sh4
parentdd59bcae7687df4b2ba8e5292607724996e00892 (diff)
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r2d: Fix flash memory size, sector size, width, device ID
pflash_cfi02_register() takes a size in bytes, a block size in bytes and a number of blocks. r2d_init() passes FLASH_SIZE, 16 * KiB, FLASH_SIZE >> 16. Does not compute: size doesn't match block size * number of blocks. The latter happens to win: FLASH_SIZE / 4, i.e. 8MiB. The best information we have on the physical hardware lists a Cypress S29PL127J60TFI130 128MiBit NOR flash addressable in words of 16 bits, in sectors of 4 and 32 Kibiwords. We don't model multiple sector sizes. Fix the flash size from 8 to 16MiB, and adjust the sector size from 16 to 64KiB. Fix the width from 4 to 2. While there, supply the real device IDs 0x0001, 0x227e, 0x2220, 0x2200 instead of zeros. Cc: Magnus Damm <magnus.damm@gmail.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190308094610.21210-10-armbru@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Diffstat (limited to 'hw/sh4')
-rw-r--r--hw/sh4/r2d.c16
1 files changed, 12 insertions, 4 deletions
diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c
index 28ed6be..e2c46b8 100644
--- a/hw/sh4/r2d.c
+++ b/hw/sh4/r2d.c
@@ -43,7 +43,7 @@
#include "exec/address-spaces.h"
#define FLASH_BASE 0x00000000
-#define FLASH_SIZE 0x02000000
+#define FLASH_SIZE (16 * MiB)
#define SDRAM_BASE 0x0c000000 /* Physical location of SDRAM: Area 3 */
#define SDRAM_SIZE 0x04000000
@@ -287,12 +287,20 @@ static void r2d_init(MachineState *machine)
sysbus_mmio_map(busdev, 1, 0x1400080c);
mmio_ide_init_drives(dev, dinfo, NULL);
- /* onboard flash memory */
+ /*
+ * Onboard flash memory
+ * According to the old board user document in Japanese (under
+ * NDA) what is referred to as FROM (Area0) is connected via a
+ * 32-bit bus and CS0 to CN8. The docs mention a Cypress
+ * S29PL127J60TFI130 chipsset. Per the 'S29PL-J 002-00615
+ * Rev. *E' datasheet, it is a 128Mbit NOR parallel flash
+ * addressable in words of 16bit.
+ */
dinfo = drive_get(IF_PFLASH, 0, 0);
pflash_cfi02_register(0x0, NULL, "r2d.flash", FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- 16 * KiB, FLASH_SIZE >> 16,
- 1, 4, 0x0000, 0x0000, 0x0000, 0x0000,
+ 64 * KiB, FLASH_SIZE >> 16,
+ 1, 2, 0x0001, 0x227e, 0x2220, 0x2200,
0x555, 0x2aa, 0);
/* NIC: rtl8139 on-board, and 2 slots. */