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| author | Bui Quang Minh <minhquangbui99@gmail.com> | 2024-01-11 22:44:00 +0700 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2024-02-14 06:09:32 -0500 |
| commit | 774204cf9874e58dc7fc13394a505452357750ad (patch) | |
| tree | 0769e519412bc9f51a56669011770eb415bb433d /hw/scsi | |
| parent | b5ee0468e9d28c6bd47cce70f90b5032dd10ecc2 (diff) | |
| download | qemu-774204cf9874e58dc7fc13394a505452357750ad.zip qemu-774204cf9874e58dc7fc13394a505452357750ad.tar.gz qemu-774204cf9874e58dc7fc13394a505452357750ad.tar.bz2 | |
apic, i386/tcg: add x2apic transitions
This commit adds support for x2APIC transitions when writing to
MSR_IA32_APICBASE register and finally adds CPUID_EXT_X2APIC to
TCG_EXT_FEATURES.
The set_base in APICCommonClass now returns an integer to indicate error in
execution. apic_set_base return -1 on invalid APIC state transition,
accelerator can use this to raise appropriate exception.
Signed-off-by: Bui Quang Minh <minhquangbui99@gmail.com>
Message-Id: <20240111154404.5333-4-minhquangbui99@gmail.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/scsi')
0 files changed, 0 insertions, 0 deletions