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| author | Michael Clark <mjc@sifive.com> | 2019-03-16 01:21:21 +0000 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@sifive.com> | 2019-03-19 05:14:40 -0700 |
| commit | d9360e96885dbd69ce4aa925d1701c7a10cf54ae (patch) | |
| tree | 54d472299af1d3e8d2de9783ff53e48772590c5f /hw/riscv | |
| parent | 929f0a7fc40d7123ddda4c9dbd78a1806999b4f7 (diff) | |
| download | qemu-d9360e96885dbd69ce4aa925d1701c7a10cf54ae.zip qemu-d9360e96885dbd69ce4aa925d1701c7a10cf54ae.tar.gz qemu-d9360e96885dbd69ce4aa925d1701c7a10cf54ae.tar.bz2 | |
RISC-V: Update load reservation comment in do_interrupt
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Alistair Francis <Alistair.Francis@wdc.com>
Signed-off-by: Michael Clark <mjc@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'hw/riscv')
0 files changed, 0 insertions, 0 deletions