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| author | Alistair Francis <alistair.francis@wdc.com> | 2021-07-09 13:38:48 +1000 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2021-07-15 08:56:00 +1000 |
| commit | bb7e0cde3cbd59e8b7d6e0e9c67e11f76cbe64d4 (patch) | |
| tree | fed0b7016ad8296b0dd3809a77341c0fa41c95ac /hw/riscv | |
| parent | 5ee257649f1a69d952c56f0a7084653e51971ce5 (diff) | |
| download | qemu-bb7e0cde3cbd59e8b7d6e0e9c67e11f76cbe64d4.zip qemu-bb7e0cde3cbd59e8b7d6e0e9c67e11f76cbe64d4.tar.gz qemu-bb7e0cde3cbd59e8b7d6e0e9c67e11f76cbe64d4.tar.bz2 | |
hw/riscv: opentitan: Add the flash alias
OpenTitan has an alias of flash avaliable which is called virtual flash.
Add support for that in the QEMU model.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id: c9cfbd2dd840fd0076877b8ea4d6dcfce60db5e9.1625801868.git.alistair.francis@wdc.com
Diffstat (limited to 'hw/riscv')
| -rw-r--r-- | hw/riscv/opentitan.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index 933c211..36a41c8 100644 --- a/hw/riscv/opentitan.c +++ b/hw/riscv/opentitan.c @@ -59,6 +59,7 @@ static const MemMapEntry ibex_memmap[] = { [IBEX_DEV_NMI_GEN] = { 0x411c0000, 0x1000 }, [IBEX_DEV_OTBN] = { 0x411d0000, 0x10000 }, [IBEX_DEV_PERI] = { 0x411f0000, 0x10000 }, + [IBEX_DEV_FLASH_VIRTUAL] = { 0x80000000, 0x80000 }, }; static void opentitan_board_init(MachineState *machine) @@ -134,8 +135,13 @@ static void lowrisc_ibex_soc_realize(DeviceState *dev_soc, Error **errp) /* Flash memory */ memory_region_init_rom(&s->flash_mem, OBJECT(dev_soc), "riscv.lowrisc.ibex.flash", memmap[IBEX_DEV_FLASH].size, &error_fatal); + memory_region_init_alias(&s->flash_alias, OBJECT(dev_soc), + "riscv.lowrisc.ibex.flash_virtual", &s->flash_mem, 0, + memmap[IBEX_DEV_FLASH_VIRTUAL].size); memory_region_add_subregion(sys_mem, memmap[IBEX_DEV_FLASH].base, &s->flash_mem); + memory_region_add_subregion(sys_mem, memmap[IBEX_DEV_FLASH_VIRTUAL].base, + &s->flash_alias); /* PLIC */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->plic), errp)) { |