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authorPhilippe Mathieu-Daudé <philmd@linaro.org>2023-05-20 07:45:10 +0200
committerAlistair Francis <alistair.francis@wdc.com>2023-06-13 17:19:42 +1000
commita828ba9d46972e32c135f386dd08c02aa7eb8f1d (patch)
tree7505b89b3034a3176982989cc823be502a3d79b0 /hw/riscv
parent8696b74a6fed86a9d2bd7e947d0490c2459a8aa6 (diff)
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hw/riscv/opentitan: Correct OpenTitanState parent type/size
OpenTitanState is the 'machine' (or 'board') state: it isn't a SysBus device, but inherits from the MachineState type. Correct the instance size. Doing so we avoid leaking an OpenTitanState pointer in opentitan_machine_init(). Fixes: fe0fe4735e ("riscv: Initial commit of OpenTitan machine") Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-Id: <20230520054510.68822-6-philmd@linaro.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/riscv')
-rw-r--r--hw/riscv/opentitan.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
index 9535308..6a2fcc4 100644
--- a/hw/riscv/opentitan.c
+++ b/hw/riscv/opentitan.c
@@ -78,8 +78,8 @@ static const MemMapEntry ibex_memmap[] = {
static void opentitan_machine_init(MachineState *machine)
{
MachineClass *mc = MACHINE_GET_CLASS(machine);
+ OpenTitanState *s = OPENTITAN_MACHINE(machine);
const MemMapEntry *memmap = ibex_memmap;
- OpenTitanState *s = g_new0(OpenTitanState, 1);
MemoryRegion *sys_mem = get_system_memory();
if (machine->ram_size != mc->default_ram_size) {
@@ -330,6 +330,7 @@ static const TypeInfo open_titan_types[] = {
}, {
.name = TYPE_OPENTITAN_MACHINE,
.parent = TYPE_MACHINE,
+ .instance_size = sizeof(OpenTitanState),
.class_init = opentitan_machine_class_init,
}
};