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authorAlistair Francis <alistair.francis@wdc.com>2020-12-16 10:22:40 -0800
committerAlistair Francis <alistair.francis@wdc.com>2020-12-17 21:56:44 -0800
commit9d01143063c1ef0e363e0e4d9bf6d9d950d0a737 (patch)
tree6c781e7f2f28d8ee95ab93d78fbad3e59b806cf7 /hw/riscv
parent7893677184681d648165caf9e8a25fccc79b4cf3 (diff)
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hw/riscv: virt: Remove compile time XLEN checks
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com> Message-id: d7ca1aca672515e6a4aa0d41716238b055f3f25c.1608142916.git.alistair.francis@wdc.com
Diffstat (limited to 'hw/riscv')
-rw-r--r--hw/riscv/virt.c32
1 files changed, 17 insertions, 15 deletions
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 5377075..9321d8e 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -43,12 +43,6 @@
#include "hw/pci/pci.h"
#include "hw/pci-host/gpex.h"
-#if defined(TARGET_RISCV32)
-# define BIOS_FILENAME "opensbi-riscv32-generic-fw_dynamic.bin"
-#else
-# define BIOS_FILENAME "opensbi-riscv64-generic-fw_dynamic.bin"
-#endif
-
static const struct MemmapEntry {
hwaddr base;
hwaddr size;
@@ -177,7 +171,7 @@ static void create_pcie_irq_map(void *fdt, char *nodename,
}
static void create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap,
- uint64_t mem_size, const char *cmdline)
+ uint64_t mem_size, const char *cmdline, bool is_32_bit)
{
void *fdt;
int i, cpu, socket;
@@ -240,11 +234,11 @@ static void create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap,
cpu_name = g_strdup_printf("/cpus/cpu@%d",
s->soc[socket].hartid_base + cpu);
qemu_fdt_add_subnode(fdt, cpu_name);
-#if defined(TARGET_RISCV32)
- qemu_fdt_setprop_string(fdt, cpu_name, "mmu-type", "riscv,sv32");
-#else
- qemu_fdt_setprop_string(fdt, cpu_name, "mmu-type", "riscv,sv48");
-#endif
+ if (is_32_bit) {
+ qemu_fdt_setprop_string(fdt, cpu_name, "mmu-type", "riscv,sv32");
+ } else {
+ qemu_fdt_setprop_string(fdt, cpu_name, "mmu-type", "riscv,sv48");
+ }
name = riscv_isa_string(&s->soc[socket].harts[cpu]);
qemu_fdt_setprop_string(fdt, cpu_name, "riscv,isa", name);
g_free(name);
@@ -606,7 +600,8 @@ static void virt_machine_init(MachineState *machine)
main_mem);
/* create device tree */
- create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline);
+ create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline,
+ riscv_is_32_bit(machine));
/* boot rom */
memory_region_init_rom(mask_rom, NULL, "riscv_virt_board.mrom",
@@ -614,8 +609,15 @@ static void virt_machine_init(MachineState *machine)
memory_region_add_subregion(system_memory, memmap[VIRT_MROM].base,
mask_rom);
- firmware_end_addr = riscv_find_and_load_firmware(machine, BIOS_FILENAME,
- start_addr, NULL);
+ if (riscv_is_32_bit(machine)) {
+ firmware_end_addr = riscv_find_and_load_firmware(machine,
+ "opensbi-riscv32-generic-fw_dynamic.bin",
+ start_addr, NULL);
+ } else {
+ firmware_end_addr = riscv_find_and_load_firmware(machine,
+ "opensbi-riscv64-generic-fw_dynamic.bin",
+ start_addr, NULL);
+ }
if (machine->kernel_filename) {
kernel_start_addr = riscv_calc_kernel_start_addr(machine,