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| author | Bin Meng <bin.meng@windriver.com> | 2022-04-21 08:33:24 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2022-04-22 10:35:16 +1000 |
| commit | 013577de8f52fc64d77d1c13d69150b5902420d9 (patch) | |
| tree | 8d3ac9eb17c1e8d4a25faa0bab077d9e72b7d383 /hw/riscv | |
| parent | c9711bd778bd94cef0460cf76fd8b4f64b9ad657 (diff) | |
| download | qemu-013577de8f52fc64d77d1c13d69150b5902420d9.zip qemu-013577de8f52fc64d77d1c13d69150b5902420d9.tar.gz qemu-013577de8f52fc64d77d1c13d69150b5902420d9.tar.bz2 | |
hw/core: tcg-cpu-ops.h: Update comments of debug_check_watchpoint()
This is now used by RISC-V as well. Update the comments.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220421003324.1134983-7-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/riscv')
0 files changed, 0 insertions, 0 deletions