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| author | Daniel Henrique Barboza <dbarboza@ventanamicro.com> | 2024-05-31 17:27:58 -0300 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2024-06-26 22:42:02 +1000 |
| commit | 8fb0bb5e8a601c66af2f1b5261256451d3d23587 (patch) | |
| tree | 081ef070f8832ba5b405db679c94c11d49e27b96 /hw/riscv/virt.c | |
| parent | e8ad5817b250720321d44302a811cf7319f4b029 (diff) | |
| download | qemu-8fb0bb5e8a601c66af2f1b5261256451d3d23587.zip qemu-8fb0bb5e8a601c66af2f1b5261256451d3d23587.tar.gz qemu-8fb0bb5e8a601c66af2f1b5261256451d3d23587.tar.bz2 | |
hw/riscv/virt.c: imsics DT: add 'qemu, imsics' to 'compatible'
The DT docs for riscv,imsics [1] predicts a 'qemu,imsics' enum in the
'compatible' property.
[1] Documentation/devicetree/bindings/interrupt-controller/riscv,imsics.yaml
Reported-by: Conor Dooley <conor@kernel.org>
Fixes: 28d8c281200f ("hw/riscv: virt: Add optional AIA IMSIC support to virt machine")
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240531202759.911601-8-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/riscv/virt.c')
| -rw-r--r-- | hw/riscv/virt.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 376e362..e1ecf79 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -515,6 +515,9 @@ static void create_fdt_one_imsic(RISCVVirtState *s, hwaddr base_addr, uint32_t imsic_max_hart_per_socket, imsic_addr, imsic_size; g_autofree uint32_t *imsic_cells = NULL; g_autofree uint32_t *imsic_regs = NULL; + static const char * const imsic_compat[2] = { + "qemu,imsics", "riscv,imsics" + }; imsic_cells = g_new0(uint32_t, ms->smp.cpus * 2); imsic_regs = g_new0(uint32_t, socket_count * 4); @@ -541,7 +544,10 @@ static void create_fdt_one_imsic(RISCVVirtState *s, hwaddr base_addr, imsic_name = g_strdup_printf("/soc/interrupt-controller@%lx", (unsigned long)base_addr); qemu_fdt_add_subnode(ms->fdt, imsic_name); - qemu_fdt_setprop_string(ms->fdt, imsic_name, "compatible", "riscv,imsics"); + qemu_fdt_setprop_string_array(ms->fdt, imsic_name, "compatible", + (char **)&imsic_compat, + ARRAY_SIZE(imsic_compat)); + qemu_fdt_setprop_cell(ms->fdt, imsic_name, "#interrupt-cells", FDT_IMSIC_INT_CELLS); qemu_fdt_setprop(ms->fdt, imsic_name, "interrupt-controller", NULL, 0); |