diff options
author | Alistair Francis <alistair.francis@wdc.com> | 2020-10-13 17:17:33 -0700 |
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committer | Alistair Francis <alistair.francis@wdc.com> | 2020-10-22 12:00:22 -0700 |
commit | 38bc4e34f29b913d28a8d2abcf2bf74a4a4a816e (patch) | |
tree | b32fdca754d2b62043f812157b1a199075fca2fc /hw/riscv/sifive_e.c | |
parent | c40778429157afbd9ba2236f1e06ca24d980cdfe (diff) | |
download | qemu-38bc4e34f29b913d28a8d2abcf2bf74a4a4a816e.zip qemu-38bc4e34f29b913d28a8d2abcf2bf74a4a4a816e.tar.gz qemu-38bc4e34f29b913d28a8d2abcf2bf74a4a4a816e.tar.bz2 |
hw/riscv: Load the kernel after the firmware
Instead of loading the kernel at a hardcoded start address, let's load
the kernel at the next aligned address after the end of the firmware.
This should have no impact for current users of OpenSBI, but will
allow loading a noMMU kernel at the start of memory.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Message-id: 46c00c4f15b42feb792090e3d74359e180a6d954.1602634524.git.alistair.francis@wdc.com
Diffstat (limited to 'hw/riscv/sifive_e.c')
-rw-r--r-- | hw/riscv/sifive_e.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c index fcfac16..59bac4c 100644 --- a/hw/riscv/sifive_e.c +++ b/hw/riscv/sifive_e.c @@ -114,7 +114,8 @@ static void sifive_e_machine_init(MachineState *machine) memmap[SIFIVE_E_DEV_MROM].base, &address_space_memory); if (machine->kernel_filename) { - riscv_load_kernel(machine->kernel_filename, NULL); + riscv_load_kernel(machine->kernel_filename, + memmap[SIFIVE_E_DEV_DTIM].base, NULL); } } |