aboutsummaryrefslogtreecommitdiff
path: root/hw/riscv/Kconfig
diff options
context:
space:
mode:
authorBin Meng <bin.meng@windriver.com>2020-09-01 09:39:01 +0800
committerAlistair Francis <alistair.francis@wdc.com>2020-09-09 15:54:18 -0700
commit8f2ac39d5d307589faca1d00d55a1a8054d53b0e (patch)
tree79fb47b7a672992620c6ffc6ef5b58b615148884 /hw/riscv/Kconfig
parenta8fb0a500a695104cda5837b7aba93dee3abddde (diff)
downloadqemu-8f2ac39d5d307589faca1d00d55a1a8054d53b0e.zip
qemu-8f2ac39d5d307589faca1d00d55a1a8054d53b0e.tar.gz
qemu-8f2ac39d5d307589faca1d00d55a1a8054d53b0e.tar.bz2
hw/riscv: microchip_pfsoc: Connect 5 MMUARTs
Microchip PolarFire SoC has 5 MMUARTs, and the Icicle Kit board wires 4 of them out. Let's connect all 5 MMUARTs. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1598924352-89526-7-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/riscv/Kconfig')
-rw-r--r--hw/riscv/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig
index 3292fae..ceb7c16 100644
--- a/hw/riscv/Kconfig
+++ b/hw/riscv/Kconfig
@@ -54,3 +54,4 @@ config MICROCHIP_PFSOC
select HART
select SIFIVE
select UNIMP
+ select MCHP_PFSOC_MMUART