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authorPeter Maydell <peter.maydell@linaro.org>2024-08-09 17:04:29 +0100
committerPeter Maydell <peter.maydell@linaro.org>2024-08-13 11:44:53 +0100
commit150c24f34e9c3388c0f0ad04ddd997e5559db800 (patch)
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parent8e0c9a9efa21a16190cbac288e414bbf1d80f639 (diff)
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target/arm: Update translation regime comment for new features
We have a long comment describing the Arm architectural translation regimes and how we map them to QEMU MMU indexes. This comment has got a bit out of date: * FEAT_SEL2 allows Secure EL2 and corresponding new regimes * FEAT_RME introduces Realm state and its translation regimes * We now model the Cortex-R52 so that is no longer a hypothetical * We separated Secure Stage 2 and NonSecure Stage 2 MMU indexes * We have an MMU index per physical address spacea Add the missing pieces so that the list of architectural translation regimes matches the Arm ARM, and the list and count of QEMU MMU indexes in the comment matches the enum. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240809160430.1144805-2-peter.maydell@linaro.org
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