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authorPhilippe Mathieu-Daudé <philmd@linaro.org>2024-01-29 17:44:43 +0100
committerThomas Huth <thuth@redhat.com>2024-03-12 11:46:16 +0100
commitee1004bba6eadeddf988a29716dc28849c0211c8 (patch)
tree6c7373918fe1ddf1db3973400105b99b84c4fdaf /hw/ppc
parent46ff64a826bbd70e98484c8c7f4c3c1d83363f1d (diff)
downloadqemu-ee1004bba6eadeddf988a29716dc28849c0211c8.zip
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bulk: Access existing variables initialized to &S->F when available
When a variable is initialized to &struct->field, use it in place. Rationale: while this makes the code more concise, this also helps static analyzers. Mechanical change using the following Coccinelle spatch script: @@ type S, F; identifier s, m, v; @@ S *s; ... F *v = &s->m; <+... - &s->m + v ...+> Inspired-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240129164514.73104-2-philmd@linaro.org> Acked-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Reviewed-by: Anthony PERARD <anthony.perard@citrix.com> [thuth: Dropped hunks that need a rebase, and fixed sizeof() in pmu_realize()] Signed-off-by: Thomas Huth <thuth@redhat.com>
Diffstat (limited to 'hw/ppc')
-rw-r--r--hw/ppc/pnv.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 0b47b92..93d5509 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -1265,11 +1265,11 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp)
}
/* Processor Service Interface (PSI) Host Bridge */
- object_property_set_int(OBJECT(&chip8->psi), "bar", PNV_PSIHB_BASE(chip),
+ object_property_set_int(OBJECT(psi8), "bar", PNV_PSIHB_BASE(chip),
&error_fatal);
- object_property_set_link(OBJECT(&chip8->psi), ICS_PROP_XICS,
+ object_property_set_link(OBJECT(psi8), ICS_PROP_XICS,
OBJECT(chip8->xics), &error_abort);
- if (!qdev_realize(DEVICE(&chip8->psi), NULL, errp)) {
+ if (!qdev_realize(DEVICE(psi8), NULL, errp)) {
return;
}
pnv_xscom_add_subregion(chip, PNV_XSCOM_PSIHB_BASE,
@@ -1300,7 +1300,7 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp)
}
pnv_xscom_add_subregion(chip, PNV_XSCOM_OCC_BASE, &chip8->occ.xscom_regs);
qdev_connect_gpio_out(DEVICE(&chip8->occ), 0,
- qdev_get_gpio_in(DEVICE(&chip8->psi), PSIHB_IRQ_OCC));
+ qdev_get_gpio_in(DEVICE(psi8), PSIHB_IRQ_OCC));
/* OCC SRAM model */
memory_region_add_subregion(get_system_memory(), PNV_OCC_SENSOR_BASE(chip),
@@ -1553,12 +1553,12 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp)
&chip9->xive.xscom_regs);
/* Processor Service Interface (PSI) Host Bridge */
- object_property_set_int(OBJECT(&chip9->psi), "bar", PNV9_PSIHB_BASE(chip),
+ object_property_set_int(OBJECT(psi9), "bar", PNV9_PSIHB_BASE(chip),
&error_fatal);
/* This is the only device with 4k ESB pages */
- object_property_set_int(OBJECT(&chip9->psi), "shift", XIVE_ESB_4K,
+ object_property_set_int(OBJECT(psi9), "shift", XIVE_ESB_4K,
&error_fatal);
- if (!qdev_realize(DEVICE(&chip9->psi), NULL, errp)) {
+ if (!qdev_realize(DEVICE(psi9), NULL, errp)) {
return;
}
pnv_xscom_add_subregion(chip, PNV9_XSCOM_PSIHB_BASE,
@@ -1594,7 +1594,7 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp)
}
pnv_xscom_add_subregion(chip, PNV9_XSCOM_OCC_BASE, &chip9->occ.xscom_regs);
qdev_connect_gpio_out(DEVICE(&chip9->occ), 0, qdev_get_gpio_in(
- DEVICE(&chip9->psi), PSIHB9_IRQ_OCC));
+ DEVICE(psi9), PSIHB9_IRQ_OCC));
/* OCC SRAM model */
memory_region_add_subregion(get_system_memory(), PNV9_OCC_SENSOR_BASE(chip),
@@ -1609,7 +1609,7 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp)
pnv_xscom_add_subregion(chip, PNV9_XSCOM_SBE_MBOX_BASE,
&chip9->sbe.xscom_mbox_regs);
qdev_connect_gpio_out(DEVICE(&chip9->sbe), 0, qdev_get_gpio_in(
- DEVICE(&chip9->psi), PSIHB9_IRQ_PSU));
+ DEVICE(psi9), PSIHB9_IRQ_PSU));
/* HOMER */
object_property_set_link(OBJECT(&chip9->homer), "chip", OBJECT(chip),
@@ -1650,7 +1650,7 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp)
PNV9_XSCOM_I2CM_SIZE,
&chip9->i2c[i].xscom_regs);
qdev_connect_gpio_out(DEVICE(&chip9->i2c[i]), 0,
- qdev_get_gpio_in(DEVICE(&chip9->psi),
+ qdev_get_gpio_in(DEVICE(psi9),
PSIHB9_IRQ_SBE_I2C));
}
}