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| author | Daniel Henrique Barboza <danielhb413@gmail.com> | 2022-03-02 06:51:40 +0100 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2022-03-02 06:51:40 +0100 |
| commit | ecccc4bed785ca9086697439f0d8ff24822a9e94 (patch) | |
| tree | 0d9e4266e5d23f915998f789f1ac6203f809c5f1 /hw/ppc | |
| parent | 1628293727f1872d1add9dc53897b2b262ed5fe9 (diff) | |
| download | qemu-ecccc4bed785ca9086697439f0d8ff24822a9e94.zip qemu-ecccc4bed785ca9086697439f0d8ff24822a9e94.tar.gz qemu-ecccc4bed785ca9086697439f0d8ff24822a9e94.tar.bz2 | |
spapr_pci_nvlink2.c: use g_autofree in spapr_phb_nvgpu_ram_populate_dt()
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220228175004.8862-13-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'hw/ppc')
| -rw-r--r-- | hw/ppc/spapr_pci_nvlink2.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/hw/ppc/spapr_pci_nvlink2.c b/hw/ppc/spapr_pci_nvlink2.c index 7fb0cf4..4678c79 100644 --- a/hw/ppc/spapr_pci_nvlink2.c +++ b/hw/ppc/spapr_pci_nvlink2.c @@ -320,7 +320,7 @@ void spapr_phb_nvgpu_populate_dt(SpaprPhbState *sphb, void *fdt, int bus_off, void spapr_phb_nvgpu_ram_populate_dt(SpaprPhbState *sphb, void *fdt) { int i, j, linkidx, npuoff; - char *npuname; + g_autofree char *npuname = NULL; if (!sphb->nvgpus) { return; @@ -333,11 +333,10 @@ void spapr_phb_nvgpu_ram_populate_dt(SpaprPhbState *sphb, void *fdt) _FDT(fdt_setprop_cell(fdt, npuoff, "#size-cells", 0)); /* Advertise NPU as POWER9 so the guest can enable NPU2 contexts */ _FDT((fdt_setprop_string(fdt, npuoff, "compatible", "ibm,power9-npu"))); - g_free(npuname); for (i = 0, linkidx = 0; i < sphb->nvgpus->num; ++i) { for (j = 0; j < sphb->nvgpus->slots[i].linknum; ++j) { - char *linkname = g_strdup_printf("link@%d", linkidx); + g_autofree char *linkname = g_strdup_printf("link@%d", linkidx); int off = fdt_add_subnode(fdt, npuoff, linkname); _FDT(off); @@ -347,7 +346,6 @@ void spapr_phb_nvgpu_ram_populate_dt(SpaprPhbState *sphb, void *fdt) _FDT((fdt_setprop_cell(fdt, off, "phandle", PHANDLE_NVLINK(sphb, i, j)))); _FDT((fdt_setprop_cell(fdt, off, "ibm,npu-link-index", linkidx))); - g_free(linkname); ++linkidx; } } @@ -360,7 +358,8 @@ void spapr_phb_nvgpu_ram_populate_dt(SpaprPhbState *sphb, void *fdt) &error_abort); uint64_t size = object_property_get_uint(nv_mrobj, "size", NULL); uint64_t mem_reg[2] = { cpu_to_be64(nvslot->gpa), cpu_to_be64(size) }; - char *mem_name = g_strdup_printf("memory@%"PRIx64, nvslot->gpa); + g_autofree char *mem_name = g_strdup_printf("memory@%"PRIx64, + nvslot->gpa); int off = fdt_add_subnode(fdt, 0, mem_name); _FDT(off); @@ -378,7 +377,6 @@ void spapr_phb_nvgpu_ram_populate_dt(SpaprPhbState *sphb, void *fdt) sizeof(mem_reg)))); _FDT((fdt_setprop_cell(fdt, off, "phandle", PHANDLE_GPURAM(sphb, i)))); - g_free(mem_name); } } |