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| author | Frederic Barrat <fbarrat@linux.ibm.com> | 2023-07-03 10:12:15 +0200 |
|---|---|---|
| committer | Daniel Henrique Barboza <danielhb413@gmail.com> | 2023-07-07 04:46:12 -0300 |
| commit | 4a1e9449e8d55c173f3eddd94ae363c2c2938fda (patch) | |
| tree | 0a2109ca2e15d4746b0859fbaae1748988d5bddb /hw/ppc | |
| parent | a8da2e1424c2f716222582a4706117d2ca845fe1 (diff) | |
| download | qemu-4a1e9449e8d55c173f3eddd94ae363c2c2938fda.zip qemu-4a1e9449e8d55c173f3eddd94ae363c2c2938fda.tar.gz qemu-4a1e9449e8d55c173f3eddd94ae363c2c2938fda.tar.bz2 | |
pnv/psi: Initialize the PSIHB interrupts to match hardware
On the powernv9 and powernv10 machines, the PSIHB interrupts are
currently initialized with a PQ state of 0b01, i.e. interrupts are
disabled. However real hardware initializes them to 0b00 for the
PSIHB. This patch updates it, in case an hypervisor is in the mood of
checking it.
Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20230703081215.55252-3-fbarrat@linux.ibm.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'hw/ppc')
| -rw-r--r-- | hw/ppc/pnv_psi.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c index 46da58d..daaa2f0 100644 --- a/hw/ppc/pnv_psi.c +++ b/hw/ppc/pnv_psi.c @@ -863,6 +863,8 @@ static void pnv_psi_power9_realize(DeviceState *dev, Error **errp) object_property_set_int(OBJECT(xsrc), "nr-irqs", PSIHB9_NUM_IRQS, &error_fatal); object_property_set_link(OBJECT(xsrc), "xive", OBJECT(psi), &error_abort); + object_property_set_int(OBJECT(xsrc), "reset-pq", XIVE_ESB_RESET, + &error_abort); if (!qdev_realize(DEVICE(xsrc), NULL, errp)) { return; } |