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| author | Cédric Le Goater <clg@kaod.org> | 2019-01-02 06:57:34 +0100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2019-01-09 09:28:14 +1100 |
| commit | 8fa1f4ef3828e71bfec1de2934c99e35c25709b6 (patch) | |
| tree | 4dd44e69fc7b5f903256d979df0ba1e678ddb0bd /hw/ppc/pnv_core.c | |
| parent | a0c493ae67c8176bba0385aaab49d6129838b525 (diff) | |
| download | qemu-8fa1f4ef3828e71bfec1de2934c99e35c25709b6.zip qemu-8fa1f4ef3828e71bfec1de2934c99e35c25709b6.tar.gz qemu-8fa1f4ef3828e71bfec1de2934c99e35c25709b6.tar.bz2 | |
spapr: modify the prototype of the cpu_intc_create() method
Today, the interrupt presenter is linked to a CPU using the
cpu_intc_create() method of the sPAPR IRQ backend. The resulting
object is assigned to the PowerPCCPU 'intc' pointer whatever the
interrupt mode, XICS or XIVE.
To support the 'dual' interrupt mode, we will need to distinguish
between the two presenter objects and for that, we plan to introduce a
second interrupt presenter object pointer under the PowerPCCPU. The
modifications below move the assignment of the presenter object under
the cpu_intc_create() method to prepare ground for the future changes.
Both sPAPR and PowerNV machines are impacted.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/ppc/pnv_core.c')
| -rw-r--r-- | hw/ppc/pnv_core.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index ad1bcc7..1202737 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -114,7 +114,7 @@ static void pnv_realize_vcpu(PowerPCCPU *cpu, PnvChip *chip, Error **errp) return; } - cpu->intc = pcc->intc_create(chip, OBJECT(cpu), &local_err); + pcc->intc_create(chip, cpu, &local_err); if (local_err) { error_propagate(errp, local_err); return; |