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| author | BALATON Zoltan <balaton@eik.bme.hu> | 2022-09-24 14:28:03 +0200 |
|---|---|---|
| committer | Daniel Henrique Barboza <danielhb413@gmail.com> | 2022-10-17 16:15:09 -0300 |
| commit | ef10aebb9a71f0c60f0b7aae808498333bb7bfd9 (patch) | |
| tree | fd50f47f16ab6726dcaad03da43dcca6a3dbdc3f /hw/pci | |
| parent | 1e545fbc88bb5abe21553972a2244f272153476d (diff) | |
| download | qemu-ef10aebb9a71f0c60f0b7aae808498333bb7bfd9.zip qemu-ef10aebb9a71f0c60f0b7aae808498333bb7bfd9.tar.gz qemu-ef10aebb9a71f0c60f0b7aae808498333bb7bfd9.tar.bz2 | |
ppc440_sdram: Move RAM size check to ppc440_sdram_init
Move the check for valid memory sizes from board to sdram controller
init. This adds the missing valid memory sizes of 16 and 8 MiB to the
DoC and the board now only checks for additional restrictions imposed
by its firmware then sdram init checks for valid sizes for SoC.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <41da3797392acaacc7963b79512c8af8005fa4b0.1664021647.git.balaton@eik.bme.hu>
[danielhb: avoid 4*GiB size due to 32 bit build problems]
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'hw/pci')
0 files changed, 0 insertions, 0 deletions