aboutsummaryrefslogtreecommitdiff
path: root/hw/pci
diff options
context:
space:
mode:
authorMichael S. Tsirkin <mst@redhat.com>2021-10-20 05:48:54 -0400
committerMichael S. Tsirkin <mst@redhat.com>2021-10-20 06:18:17 -0400
commit0e464f7d993113119f0fd17b890831440734ce15 (patch)
tree308dfdd4966e189c9c9bcda90930a75e8563e59d /hw/pci
parent402378407dbdce79ce745a13f5c84815f929cfdd (diff)
downloadqemu-0e464f7d993113119f0fd17b890831440734ce15.zip
qemu-0e464f7d993113119f0fd17b890831440734ce15.tar.gz
qemu-0e464f7d993113119f0fd17b890831440734ce15.tar.bz2
pci: fix PCI resource reserve capability on BE
PCI resource reserve capability should use LE format as all other PCI things. If we don't then seabios won't boot: === PCI new allocation pass #1 === PCI: check devices PCI: QEMU resource reserve cap: size 10000000000000 type io PCI: secondary bus 1 size 10000000000000 type io PCI: secondary bus 1 size 00200000 type mem PCI: secondary bus 1 size 00200000 type prefmem === PCI new allocation pass #2 === PCI: out of I/O address space This became more important since we started reserving IO by default, previously no one noticed. Fixes: e2a6290aab ("hw/pcie-root-port: Fix hotplug for PCI devices requiring IO") Cc: marcel.apfelbaum@gmail.com Fixes: 226263fb5c ("hw/pci: add QEMU-specific PCI capability to the Generic PCI Express Root Port") Cc: zuban32s@gmail.com Fixes: 6755e618d0 ("hw/pci: add PCI resource reserve capability to legacy PCI bridge") Cc: jing2.liu@linux.intel.com Tested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Diffstat (limited to 'hw/pci')
-rw-r--r--hw/pci/pci_bridge.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
index d1f902e..da34c8e 100644
--- a/hw/pci/pci_bridge.c
+++ b/hw/pci/pci_bridge.c
@@ -448,11 +448,11 @@ int pci_bridge_qemu_reserve_cap_init(PCIDevice *dev, int cap_offset,
PCIBridgeQemuCap cap = {
.len = cap_len,
.type = REDHAT_PCI_CAP_RESOURCE_RESERVE,
- .bus_res = res_reserve.bus,
- .io = res_reserve.io,
- .mem = res_reserve.mem_non_pref,
- .mem_pref_32 = res_reserve.mem_pref_32,
- .mem_pref_64 = res_reserve.mem_pref_64
+ .bus_res = cpu_to_le32(res_reserve.bus),
+ .io = cpu_to_le64(res_reserve.io),
+ .mem = cpu_to_le32(res_reserve.mem_non_pref),
+ .mem_pref_32 = cpu_to_le32(res_reserve.mem_pref_32),
+ .mem_pref_64 = cpu_to_le64(res_reserve.mem_pref_64)
};
int offset = pci_add_capability(dev, PCI_CAP_ID_VNDR,