aboutsummaryrefslogtreecommitdiff
path: root/hw/pci-host
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2017-10-16 17:29:16 +0100
committerPeter Maydell <peter.maydell@linaro.org>2017-10-16 17:29:16 +0100
commitc5bbcaa4b7c0f8a322bebe9ec563560178a68b55 (patch)
treedf49749a080033a983e0080ad6ce58ffe8d119cf /hw/pci-host
parent79b2a13aa81724228166c794f48eb75bfb696b88 (diff)
parentab06ec43577177a442e8e5ca28d0154efe4ff60f (diff)
downloadqemu-c5bbcaa4b7c0f8a322bebe9ec563560178a68b55.zip
qemu-c5bbcaa4b7c0f8a322bebe9ec563560178a68b55.tar.gz
qemu-c5bbcaa4b7c0f8a322bebe9ec563560178a68b55.tar.bz2
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
pc, pci, virtio: fixes, features A bunch of fixes all over the place. A new vmcore device - the user interface around it is still somewhat controversial, but I feel most of the code is fine, suggestions can be addressed by adding patches on top. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Sun 15 Oct 2017 04:02:23 BST # gpg: using RSA key 0x281F0DB8D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: (26 commits) tests/pxe: Test more NICs when running in SPEED=slow mode pc: remove useless hot_add_cpu initialisation isapc: Remove unnecessary migration compatibility code virtio-pci: Replace modern_as with direct access to modern_bar virtio: fix descriptor counting in virtqueue_pop hw/gen_pcie_root_port: make IO RO 0 on IO disabled pci: Validate interfaces on base_class_init xen/pt: Mark TYPE_XEN_PT_DEVICE as hybrid pci: Add INTERFACE_CONVENTIONAL_PCI_DEVICE to Conventional PCI devices pci: Add INTERFACE_PCIE_DEVICE to all PCIe devices pci: Add interface names to hybrid PCI devices pci: conventional-pci-device and pci-express-device interfaces PCI: PCIe access should always be little endian virtio/pci/migration: Convert to VMState hw/pci-bridge/pcie_pci_bridge: properly handle MSI unavailability case pci: allow 32-bit PCI IO accesses to pass through the PCI bridge virtio/vhost: reset dev->log after syncing MAINTAINERS: add Dump maintainers scripts/dump-guest-memory.py: add vmcoreinfo kdump: set vmcoreinfo location ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/pci-host')
-rw-r--r--hw/pci-host/apb.c8
-rw-r--r--hw/pci-host/bonito.c4
-rw-r--r--hw/pci-host/gpex.c4
-rw-r--r--hw/pci-host/grackle.c4
-rw-r--r--hw/pci-host/piix.c8
-rw-r--r--hw/pci-host/ppce500.c4
-rw-r--r--hw/pci-host/prep.c4
-rw-r--r--hw/pci-host/q35.c4
-rw-r--r--hw/pci-host/uninorth.c16
-rw-r--r--hw/pci-host/versatile.c4
-rw-r--r--hw/pci-host/xilinx-pcie.c4
11 files changed, 64 insertions, 0 deletions
diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c
index b709456..1edf57f 100644
--- a/hw/pci-host/apb.c
+++ b/hw/pci-host/apb.c
@@ -836,6 +836,10 @@ static const TypeInfo pbm_pci_host_info = {
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PCIDevice),
.class_init = pbm_pci_host_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+ { },
+ },
};
static void pbm_host_class_init(ObjectClass *klass, void *data)
@@ -883,6 +887,10 @@ static const TypeInfo pbm_pci_bridge_info = {
.parent = TYPE_PCI_BRIDGE,
.class_init = pbm_pci_bridge_class_init,
.instance_size = sizeof(PBMPCIBridge),
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+ { },
+ },
};
static void pbm_iommu_memory_region_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index 89133a9..9f61e27 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -833,6 +833,10 @@ static const TypeInfo bonito_info = {
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PCIBonitoState),
.class_init = bonito_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+ { },
+ },
};
static void bonito_pcihost_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c
index be25245..4090793 100644
--- a/hw/pci-host/gpex.c
+++ b/hw/pci-host/gpex.c
@@ -166,6 +166,10 @@ static const TypeInfo gpex_root_info = {
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(GPEXRootState),
.class_init = gpex_root_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+ { },
+ },
};
static void gpex_register(void)
diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c
index 2e281f6..38cd279 100644
--- a/hw/pci-host/grackle.c
+++ b/hw/pci-host/grackle.c
@@ -142,6 +142,10 @@ static const TypeInfo grackle_pci_info = {
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PCIDevice),
.class_init = grackle_pci_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+ { },
+ },
};
static void pci_grackle_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index dec345f..a7e2256 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -696,6 +696,10 @@ static const TypeInfo piix3_pci_type_info = {
.instance_size = sizeof(PIIX3State),
.abstract = true,
.class_init = pci_piix3_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+ { },
+ },
};
static void piix3_class_init(ObjectClass *klass, void *data)
@@ -750,6 +754,10 @@ static const TypeInfo i440fx_info = {
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PCII440FXState),
.class_init = i440fx_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+ { },
+ },
};
/* IGD Passthrough Host Bridge. */
diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c
index becc0ee..39cd244 100644
--- a/hw/pci-host/ppce500.c
+++ b/hw/pci-host/ppce500.c
@@ -516,6 +516,10 @@ static const TypeInfo e500_host_bridge_info = {
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PPCE500PCIBridgeState),
.class_init = e500_host_bridge_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+ { },
+ },
};
static Property pcihost_properties[] = {
diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c
index 8b293ba..92eed0f 100644
--- a/hw/pci-host/prep.c
+++ b/hw/pci-host/prep.c
@@ -372,6 +372,10 @@ static const TypeInfo raven_info = {
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(RavenPCIState),
.class_init = raven_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+ { },
+ },
};
static Property raven_pcihost_properties[] = {
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 1ff648e..ddaa7d1 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -591,6 +591,10 @@ static const TypeInfo mch_info = {
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(MCHPCIState),
.class_init = mch_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+ { },
+ },
};
static void q35_register(void)
diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
index 6cf5e59..ea5c265 100644
--- a/hw/pci-host/uninorth.c
+++ b/hw/pci-host/uninorth.c
@@ -374,6 +374,10 @@ static const TypeInfo unin_main_pci_host_info = {
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PCIDevice),
.class_init = unin_main_pci_host_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+ { },
+ },
};
static void u3_agp_pci_host_class_init(ObjectClass *klass, void *data)
@@ -398,6 +402,10 @@ static const TypeInfo u3_agp_pci_host_info = {
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PCIDevice),
.class_init = u3_agp_pci_host_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+ { },
+ },
};
static void unin_agp_pci_host_class_init(ObjectClass *klass, void *data)
@@ -422,6 +430,10 @@ static const TypeInfo unin_agp_pci_host_info = {
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PCIDevice),
.class_init = unin_agp_pci_host_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+ { },
+ },
};
static void unin_internal_pci_host_class_init(ObjectClass *klass, void *data)
@@ -446,6 +458,10 @@ static const TypeInfo unin_internal_pci_host_info = {
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PCIDevice),
.class_init = unin_internal_pci_host_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+ { },
+ },
};
static void pci_unin_main_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c
index aa1fdf7..6394a52 100644
--- a/hw/pci-host/versatile.c
+++ b/hw/pci-host/versatile.c
@@ -487,6 +487,10 @@ static const TypeInfo versatile_pci_host_info = {
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PCIDevice),
.class_init = versatile_pci_host_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+ { },
+ },
};
static Property pci_vpb_properties[] = {
diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c
index 4613dda..7659253 100644
--- a/hw/pci-host/xilinx-pcie.c
+++ b/hw/pci-host/xilinx-pcie.c
@@ -317,6 +317,10 @@ static const TypeInfo xilinx_pcie_root_info = {
.parent = TYPE_PCI_BRIDGE,
.instance_size = sizeof(XilinxPCIERoot),
.class_init = xilinx_pcie_root_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_PCIE_DEVICE },
+ { }
+ },
};
static void xilinx_pcie_register(void)