diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2023-02-05 16:49:09 +0000 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2023-02-05 16:49:09 +0000 |
commit | 6661b8c7fe3f8b5687d2d90f7b4f3f23d70e3e8b (patch) | |
tree | 5c22813738964f1923ea4216a7297f50811929dc /hw/pci-host | |
parent | b52388129bf0097954515c097e83e6112de1b579 (diff) | |
parent | bd591dc1b3c39b7f73b8d9f20be6e9001c905238 (diff) | |
download | qemu-6661b8c7fe3f8b5687d2d90f7b4f3f23d70e3e8b.zip qemu-6661b8c7fe3f8b5687d2d90f7b4f3f23d70e3e8b.tar.gz qemu-6661b8c7fe3f8b5687d2d90f7b4f3f23d70e3e8b.tar.bz2 |
Merge tag 'pull-ppc-20230205' of https://gitlab.com/danielhb/qemu into staging
ppc patch queue for 2023-02-05:
This queue includes patches that aren't PPC specific but benefit/impact
PPC machines, such as the changes to guestperf.py, mv64361 and sm501. As
for PPC specific changes we have e500 and PNV_PHB5 fixes.
# -----BEGIN PGP SIGNATURE-----
#
# iIwEABYKADQWIQQX6/+ZI9AYAK8oOBk82cqW3gMxZAUCY99+yRYcZGFuaWVsaGI0
# MTNAZ21haWwuY29tAAoJEDzZypbeAzFkOQsA/1UxMHen/3tW908shrRMwS7WSzDa
# 4x0tU4L+bMpEfgVJAQDeKIyIbdajtv4v2XfZyQ9flfUo64cY0xze+T+SDW+fBw==
# =eB7g
# -----END PGP SIGNATURE-----
# gpg: Signature made Sun 05 Feb 2023 10:02:49 GMT
# gpg: using EDDSA key 17EBFF9923D01800AF2838193CD9CA96DE033164
# gpg: issuer "danielhb413@gmail.com"
# gpg: Good signature from "Daniel Henrique Barboza <danielhb413@gmail.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 17EB FF99 23D0 1800 AF28 3819 3CD9 CA96 DE03 3164
* tag 'pull-ppc-20230205' of https://gitlab.com/danielhb/qemu:
hw/display/sm501: Code style fix
hw/display/sm501: Remove unneeded casts from void pointer
hw/display/sm501: Remove parenthesis around constant macro definitions
hw/ppc/pegasos2: Fix a typo in a comment
ppc/pnv/pci: Fix PHB xscom registers memory region name
ppc/pnv/pci: Update PHB5 version register
ppc/pnv/pci: Remove duplicate definition of PNV_PHB5_DEVICE_ID
ppc/pnv/pci: Cleanup PnvPHBPecState structure
hw/ppc/e500.c: Attach eSDHC unimplemented region to ccsr_addr_space
hw/ppc/e500.c: Avoid hardcoding parent device in create_devtree_etsec()
hw/ppc/e500{, plat}: Drop redundant checks for presence of platform bus
hw/ppc: Set machine->fdt in e500 machines
hw/pci-host/mv64361: Reuse pci_swizzle_map_irq_fn
ppc/pegasos2: Improve readability of VIA south bridge creation
tests/migration: add support for ppc64le for guestperf.py
tests/migration: add sysprof-capture-4 as dependency for stress binary
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/pci-host')
-rw-r--r-- | hw/pci-host/mv64361.c | 7 | ||||
-rw-r--r-- | hw/pci-host/pnv_phb4.c | 2 |
2 files changed, 2 insertions, 7 deletions
diff --git a/hw/pci-host/mv64361.c b/hw/pci-host/mv64361.c index 015b92b..f43f33f 100644 --- a/hw/pci-host/mv64361.c +++ b/hw/pci-host/mv64361.c @@ -72,11 +72,6 @@ struct MV64361PCIState { uint64_t remap[5]; }; -static int mv64361_pcihost_map_irq(PCIDevice *pci_dev, int n) -{ - return (n + PCI_SLOT(pci_dev->devfn)) % PCI_NUM_PINS; -} - static void mv64361_pcihost_set_irq(void *opaque, int n, int level) { MV64361PCIState *s = opaque; @@ -97,7 +92,7 @@ static void mv64361_pcihost_realize(DeviceState *dev, Error **errp) g_free(name); name = g_strdup_printf("pci.%d", s->index); h->bus = pci_register_root_bus(dev, name, mv64361_pcihost_set_irq, - mv64361_pcihost_map_irq, dev, + pci_swizzle_map_irq_fn, dev, &s->mem, &s->io, 0, 4, TYPE_PCI_BUS); g_free(name); pci_create_simple(h->bus, 0, TYPE_MV64361_PCI_BRIDGE); diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index ccbde84..542f9e2 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -1497,7 +1497,7 @@ static void pnv_phb4_xscom_realize(PnvPHB4 *phb) PHB4_PEC_PCI_STK_REGS_COUNT); /* PHB pass-through */ - snprintf(name, sizeof(name), "xscom-pec-%d.%d-pci-phb-%d", + snprintf(name, sizeof(name), "xscom-pec-%d.%d-phb-%d", pec->chip_id, pec->index, stack_no); pnv_xscom_region_init(&phb->phb_regs_mr, OBJECT(phb), &pnv_phb4_xscom_ops, phb, name, 0x40); |