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author | Philippe Mathieu-Daudé <philmd@redhat.com> | 2019-10-15 14:05:42 +0200 |
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committer | Philippe Mathieu-Daudé <philmd@redhat.com> | 2019-11-05 23:33:12 +0100 |
commit | 4b19de14b145ac1df3082f625e3b8f9dcb0e1918 (patch) | |
tree | 5d689de0bc7383e0b03da4b0bd5d04c7921a12d0 /hw/pci-host | |
parent | 0063454affb3c5a595539a3cad9e20e7229d8fac (diff) | |
download | qemu-4b19de14b145ac1df3082f625e3b8f9dcb0e1918.zip qemu-4b19de14b145ac1df3082f625e3b8f9dcb0e1918.tar.gz qemu-4b19de14b145ac1df3082f625e3b8f9dcb0e1918.tar.bz2 |
hw/pci-host/piix: Define and use the PIIX IRQ Route Control Registers
The IRQ Route Control registers definitions belong to the PIIX
chipset. We were only defining the 'A' register. Define the other
B, C and D registers, and use them.
Acked-by: Paul Durrant <paul@xen.org>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Diffstat (limited to 'hw/pci-host')
-rw-r--r-- | hw/pci-host/piix.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index 6548d9a..390fb9c 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -61,7 +61,6 @@ typedef struct I440FXState { #define PIIX_NUM_PIC_IRQS 16 /* i8259 * 2 */ #define PIIX_NUM_PIRQS 4ULL /* PIRQ[A-D] */ #define XEN_PIIX_NUM_PIRQS 128ULL -#define PIIX_PIRQC 0x60 typedef struct PIIX3State { PCIDevice dev; @@ -468,7 +467,7 @@ static void piix3_set_irq_level_internal(PIIX3State *piix3, int pirq, int level) int pic_irq; uint64_t mask; - pic_irq = piix3->dev.config[PIIX_PIRQC + pirq]; + pic_irq = piix3->dev.config[PIIX_PIRQCA + pirq]; if (pic_irq >= PIIX_NUM_PIC_IRQS) { return; } @@ -482,7 +481,7 @@ static void piix3_set_irq_level(PIIX3State *piix3, int pirq, int level) { int pic_irq; - pic_irq = piix3->dev.config[PIIX_PIRQC + pirq]; + pic_irq = piix3->dev.config[PIIX_PIRQCA + pirq]; if (pic_irq >= PIIX_NUM_PIC_IRQS) { return; } @@ -501,7 +500,7 @@ static void piix3_set_irq(void *opaque, int pirq, int level) static PCIINTxRoute piix3_route_intx_pin_to_irq(void *opaque, int pin) { PIIX3State *piix3 = opaque; - int irq = piix3->dev.config[PIIX_PIRQC + pin]; + int irq = piix3->dev.config[PIIX_PIRQCA + pin]; PCIINTxRoute route; if (irq < PIIX_NUM_PIC_IRQS) { @@ -530,7 +529,7 @@ static void piix3_write_config(PCIDevice *dev, uint32_t address, uint32_t val, int len) { pci_default_write_config(dev, address, val, len); - if (ranges_overlap(address, len, PIIX_PIRQC, 4)) { + if (ranges_overlap(address, len, PIIX_PIRQCA, 4)) { PIIX3State *piix3 = PIIX3_PCI_DEVICE(dev); int pic_irq; |