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authorBastian Koppelmann <kbastian@mail.uni-paderborn.de>2023-02-02 13:04:25 +0100
committerBastian Koppelmann <kbastian@mail.uni-paderborn.de>2023-02-08 09:57:42 +0100
commit1c6b2e4b794d460a16a7f94cf6a7d6864f708be1 (patch)
tree776e2e4d573a027694557dec77a54c8f8b529f8b /hw/pci-host/sh_pci.c
parent76f7f54840abef8f712e51d87ecb38f27a0d9db0 (diff)
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target/tricore: Fix OPC2_32_RCRW_INSERT translation
we were mixing up the "c" and "d" registers. We used "d" as a destination register und "c" as the source. According to the TriCore ISA manual 1.6 vol 2 it is the other way round. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/653 Message-Id: <20230202120432.1268-4-kbastian@mail.uni-paderborn.de> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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