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| author | Stafford Horne <shorne@gmail.com> | 2022-02-19 14:57:07 +0900 |
|---|---|---|
| committer | Stafford Horne <shorne@gmail.com> | 2022-02-25 15:42:23 +0900 |
| commit | f42e09e6a6b3dd996419fe0e6c1bbc68898f3a6e (patch) | |
| tree | 5721b20c62a3db4750fc99063a4e559c1d3ccf96 /hw/openrisc/openrisc_sim.c | |
| parent | 22991cfbdfacc195b982d3ee12a823e75ded4b29 (diff) | |
| download | qemu-f42e09e6a6b3dd996419fe0e6c1bbc68898f3a6e.zip qemu-f42e09e6a6b3dd996419fe0e6c1bbc68898f3a6e.tar.gz qemu-f42e09e6a6b3dd996419fe0e6c1bbc68898f3a6e.tar.bz2 | |
hw/openrisc/openrisc_sim: Increase max_cpus to 4
Now that we no longer have a limit of 2 CPUs due to fixing the
IRQ routing issues we can increase the max. Here we increase
the limit to 4, we could go higher, but currently OMPIC has a
limit of 4, so we align with that.
Signed-off-by: Stafford Horne <shorne@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'hw/openrisc/openrisc_sim.c')
| -rw-r--r-- | hw/openrisc/openrisc_sim.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c index 5bfbac0..8cfb92b 100644 --- a/hw/openrisc/openrisc_sim.c +++ b/hw/openrisc/openrisc_sim.c @@ -37,6 +37,8 @@ #define KERNEL_LOAD_ADDR 0x100 +#define OR1KSIM_CPUS_MAX 4 + #define TYPE_OR1KSIM_MACHINE MACHINE_TYPE_NAME("or1k-sim") #define OR1KSIM_MACHINE(obj) \ OBJECT_CHECK(Or1ksimState, (obj), TYPE_OR1KSIM_MACHINE) @@ -197,12 +199,12 @@ static void openrisc_sim_init(MachineState *machine) { ram_addr_t ram_size = machine->ram_size; const char *kernel_filename = machine->kernel_filename; - OpenRISCCPU *cpus[2] = {}; + OpenRISCCPU *cpus[OR1KSIM_CPUS_MAX] = {}; MemoryRegion *ram; int n; unsigned int smp_cpus = machine->smp.cpus; - assert(smp_cpus >= 1 && smp_cpus <= 2); + assert(smp_cpus >= 1 && smp_cpus <= OR1KSIM_CPUS_MAX); for (n = 0; n < smp_cpus; n++) { cpus[n] = OPENRISC_CPU(cpu_create(machine->cpu_type)); if (cpus[n] == NULL) { @@ -243,7 +245,7 @@ static void openrisc_sim_machine_init(ObjectClass *oc, void *data) mc->desc = "or1k simulation"; mc->init = openrisc_sim_init; - mc->max_cpus = 2; + mc->max_cpus = OR1KSIM_CPUS_MAX; mc->is_default = true; mc->default_cpu_type = OPENRISC_CPU_TYPE_NAME("or1200"); } |