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authorArd Biesheuvel <ard.biesheuvel@linaro.org>2018-01-25 11:45:28 +0000
committerPeter Maydell <peter.maydell@linaro.org>2018-01-25 11:45:28 +0000
commit9aea1ea31af25fe344a88da086ff913cca09c667 (patch)
treee9cf04113ff4af8f7cf46bc4e176423815b02560 /hw/net
parent0f79bfe38a2cf0f43c7ea4959da7f8ebd7858f3d (diff)
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target/arm: Fix 32-bit address truncation
Commit ("3b39d734141a target/arm: Handle page table walk load failures correctly") modified both versions of the page table walking code (i.e., arm_ldl_ptw and arm_ldq_ptw) to record the result of the translation in a temporary 'data' variable so that it can be inspected before being returned. However, arm_ldq_ptw() returns an uint64_t, and using a temporary uint32_t variable truncates the upper bits, corrupting the result. This causes problems when using more than 4 GB of memory in a TCG guest. So use a uint64_t instead. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Message-id: 20180119194648.25501-1-ard.biesheuvel@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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