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author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-08-28 10:02:44 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2020-08-28 10:02:44 +0100 |
commit | 0e5aac18bc31dbdfab51f9784240d0c31a4c5579 (patch) | |
tree | 7b1518c3dff0a6cb691902116b575e9d3f462b6f /hw/net/e1000x_common.c | |
parent | 79ed6fd65026fbdc71c5f2a7a42a80aac0063d94 (diff) | |
download | qemu-0e5aac18bc31dbdfab51f9784240d0c31a4c5579.zip qemu-0e5aac18bc31dbdfab51f9784240d0c31a4c5579.tar.gz qemu-0e5aac18bc31dbdfab51f9784240d0c31a4c5579.tar.bz2 |
target/arm: Clarify HCR_EL2 ARMCPRegInfo type
In commit ce4afed839 ("target/arm: Implement AArch32 HCR and HCR2")
the HCR_EL2 register has been changed from type NO_RAW (no underlying
state and does not support raw access for state saving/loading) to
type CONST (TCG can assume the value to be constant), removing the
read/write accessors.
We forgot to remove the previous type ARM_CP_NO_RAW. This is not
really a problem since the field is overwritten. However it makes
code review confuse, so remove it.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200812111223.7787-1-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/net/e1000x_common.c')
0 files changed, 0 insertions, 0 deletions