aboutsummaryrefslogtreecommitdiff
path: root/hw/misc
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2018-06-12 14:32:19 +0100
committerPeter Maydell <peter.maydell@linaro.org>2018-06-12 14:32:19 +0100
commit3b68de85b9b964e1bfb8474af1208717ba29b9ff (patch)
tree00abfa23137128f716b91a9aa8d62c3adaf123d7 /hw/misc
parent98d11a6e72c4c4524f9623a165d081da65936269 (diff)
parent30f79dc13f116a79ff45d37ad0f5c035012064a7 (diff)
downloadqemu-3b68de85b9b964e1bfb8474af1208717ba29b9ff.zip
qemu-3b68de85b9b964e1bfb8474af1208717ba29b9ff.tar.gz
qemu-3b68de85b9b964e1bfb8474af1208717ba29b9ff.tar.bz2
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-3.0-20180612' into staging
ppc patch queue 2018-06-12 Here's another batch of ppc patches towards the 3.0 release. There's a fair bit here, because I've been working through my mail backlog after a holiday. There's not much of a central theme, amongst other things we have: * ppc440 / sam460ex improvements * logging and error cleanups * 40p (PReP) bugfixes * Macintosh fixes and cleanups * Add emulation of the new POWER9 store-forwarding barrier instruction variant * Hotplug cleanups # gpg: Signature made Tue 12 Jun 2018 07:43:21 BST # gpg: using RSA key 6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-3.0-20180612: (33 commits) spapr_pci: Remove unhelpful pagesize warning xics_kvm: use KVM helpers ppc/pnv: fix LPC HC firmware address space spapr: handle cpu core unplug via hotplug handler chain spapr: handle pc-dimm unplug via hotplug handler chain spapr: introduce machine unplug handler spapr: move memory hotplug support check into spapr_memory_pre_plug() spapr: move lookup of the node into spapr_memory_plug() spapr: no need to verify the node target/ppc: Allow PIR read in privileged mode ppc4xx_i2c: Clean up and improve error logging target/ppc: extend eieio for POWER9 mos6522: convert VMSTATE_TIMER_PTR_TEST to VMSTATE_TIMER_PTR mos6522: move timer frequency initialisation to mos6522_reset cuda: embed mos6522_cuda device directly rather than using QOM object link mos6522: fix vmstate_mos6522_timer version in vmstate_mos6522 ppc: add missing FW_CFG_PPC_NVRAM_FLAT definition ppc: remove obsolete macio_init() definition from mac.h ppc: remove obsolete pci_pmac_init() definitions from mac.h hw/misc/mos6522: Add trailing '\n' to qemu_log() calls ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/misc')
-rw-r--r--hw/misc/macio/cuda.c50
-rw-r--r--hw/misc/macio/macio.c3
-rw-r--r--hw/misc/macio/trace-events4
-rw-r--r--hw/misc/mos6522.c30
4 files changed, 36 insertions, 51 deletions
diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c
index bd9b862..9651ed9 100644
--- a/hw/misc/macio/cuda.c
+++ b/hw/misc/macio/cuda.c
@@ -65,7 +65,7 @@ static void cuda_receive_packet_from_host(CUDAState *s,
static uint64_t cuda_get_counter_value(MOS6522State *s, MOS6522Timer *ti)
{
MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj);
- CUDAState *cs = mcs->cuda;
+ CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda);
/* Reverse of the tb calculation algorithm that Mac OS X uses on bootup */
uint64_t tb_diff = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
@@ -78,7 +78,7 @@ static uint64_t cuda_get_counter_value(MOS6522State *s, MOS6522Timer *ti)
static uint64_t cuda_get_load_time(MOS6522State *s, MOS6522Timer *ti)
{
MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj);
- CUDAState *cs = mcs->cuda;
+ CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda);
uint64_t load_time = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
cs->tb_frequency, NANOSECONDS_PER_SECOND);
@@ -88,7 +88,7 @@ static uint64_t cuda_get_load_time(MOS6522State *s, MOS6522Timer *ti)
static void cuda_set_sr_int(void *opaque)
{
CUDAState *s = opaque;
- MOS6522CUDAState *mcs = s->mos6522_cuda;
+ MOS6522CUDAState *mcs = &s->mos6522_cuda;
MOS6522State *ms = MOS6522(mcs);
MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms);
@@ -97,7 +97,7 @@ static void cuda_set_sr_int(void *opaque)
static void cuda_delay_set_sr_int(CUDAState *s)
{
- MOS6522CUDAState *mcs = s->mos6522_cuda;
+ MOS6522CUDAState *mcs = &s->mos6522_cuda;
MOS6522State *ms = MOS6522(mcs);
MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms);
int64_t expire;
@@ -117,7 +117,7 @@ static void cuda_delay_set_sr_int(CUDAState *s)
/* NOTE: TIP and TREQ are negated */
static void cuda_update(CUDAState *s)
{
- MOS6522CUDAState *mcs = s->mos6522_cuda;
+ MOS6522CUDAState *mcs = &s->mos6522_cuda;
MOS6522State *ms = MOS6522(mcs);
int packet_received, len;
@@ -462,7 +462,7 @@ static void cuda_receive_packet_from_host(CUDAState *s,
static uint64_t mos6522_cuda_read(void *opaque, hwaddr addr, unsigned size)
{
CUDAState *s = opaque;
- MOS6522CUDAState *mcs = s->mos6522_cuda;
+ MOS6522CUDAState *mcs = &s->mos6522_cuda;
MOS6522State *ms = MOS6522(mcs);
addr = (addr >> 9) & 0xf;
@@ -473,7 +473,7 @@ static void mos6522_cuda_write(void *opaque, hwaddr addr, uint64_t val,
unsigned size)
{
CUDAState *s = opaque;
- MOS6522CUDAState *mcs = s->mos6522_cuda;
+ MOS6522CUDAState *mcs = &s->mos6522_cuda;
MOS6522State *ms = MOS6522(mcs);
addr = (addr >> 9) & 0xf;
@@ -492,9 +492,11 @@ static const MemoryRegionOps mos6522_cuda_ops = {
static const VMStateDescription vmstate_cuda = {
.name = "cuda",
- .version_id = 4,
- .minimum_version_id = 4,
+ .version_id = 5,
+ .minimum_version_id = 5,
.fields = (VMStateField[]) {
+ VMSTATE_STRUCT(mos6522_cuda.parent_obj, CUDAState, 0, vmstate_mos6522,
+ MOS6522State),
VMSTATE_UINT8(last_b, CUDAState),
VMSTATE_UINT8(last_acr, CUDAState),
VMSTATE_INT32(data_in_size, CUDAState),
@@ -530,12 +532,8 @@ static void cuda_realize(DeviceState *dev, Error **errp)
DeviceState *d;
struct tm tm;
- d = qdev_create(NULL, TYPE_MOS6522_CUDA);
- object_property_set_link(OBJECT(d), OBJECT(s), "cuda", errp);
- qdev_init_nofail(d);
- s->mos6522_cuda = MOS6522_CUDA(d);
-
/* Pass IRQ from 6522 */
+ d = DEVICE(&s->mos6522_cuda);
ms = MOS6522(d);
sbd = SYS_BUS_DEVICE(s);
sysbus_pass_irq(sbd, SYS_BUS_DEVICE(ms));
@@ -556,6 +554,10 @@ static void cuda_init(Object *obj)
CUDAState *s = CUDA(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+ object_initialize(&s->mos6522_cuda, sizeof(s->mos6522_cuda),
+ TYPE_MOS6522_CUDA);
+ qdev_set_parent_bus(DEVICE(&s->mos6522_cuda), sysbus_get_default());
+
memory_region_init_io(&s->mem, obj, &mos6522_cuda_ops, s, "cuda", 0x2000);
sysbus_init_mmio(sbd, &s->mem);
@@ -590,37 +592,28 @@ static const TypeInfo cuda_type_info = {
static void mos6522_cuda_portB_write(MOS6522State *s)
{
MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj);
+ CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda);
- cuda_update(mcs->cuda);
+ cuda_update(cs);
}
-static void mos6522_cuda_realize(DeviceState *dev, Error **errp)
+static void mos6522_cuda_reset(DeviceState *dev)
{
MOS6522State *ms = MOS6522(dev);
MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms);
- mdc->parent_realize(dev, errp);
+ mdc->parent_reset(dev);
ms->timers[0].frequency = CUDA_TIMER_FREQ;
ms->timers[1].frequency = (SCALE_US * 6000) / 4700;
}
-static void mos6522_cuda_init(Object *obj)
-{
- MOS6522CUDAState *s = MOS6522_CUDA(obj);
-
- object_property_add_link(obj, "cuda", TYPE_CUDA,
- (Object **) &s->cuda,
- qdev_prop_allow_set_link_before_realize,
- 0, NULL);
-}
-
static void mos6522_cuda_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
MOS6522DeviceClass *mdc = MOS6522_DEVICE_CLASS(oc);
- dc->realize = mos6522_cuda_realize;
+ dc->reset = mos6522_cuda_reset;
mdc->portB_write = mos6522_cuda_portB_write;
mdc->get_timer1_counter_value = cuda_get_counter_value;
mdc->get_timer2_counter_value = cuda_get_counter_value;
@@ -632,7 +625,6 @@ static const TypeInfo mos6522_cuda_type_info = {
.name = TYPE_MOS6522_CUDA,
.parent = TYPE_MOS6522,
.instance_size = sizeof(MOS6522CUDAState),
- .instance_init = mos6522_cuda_init,
.class_init = mos6522_cuda_class_init,
};
diff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c
index 79621eb..f9a40ee 100644
--- a/hw/misc/macio/macio.c
+++ b/hw/misc/macio/macio.c
@@ -32,6 +32,7 @@
#include "hw/char/escc.h"
#include "hw/misc/macio/macio.h"
#include "hw/intc/heathrow_pic.h"
+#include "trace.h"
/* Note: this code is strongly inspirated from the corresponding code
* in PearPC */
@@ -246,6 +247,7 @@ static void macio_oldworld_init(Object *obj)
static void timer_write(void *opaque, hwaddr addr, uint64_t value,
unsigned size)
{
+ trace_macio_timer_write(addr, size, value);
}
static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size)
@@ -266,6 +268,7 @@ static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size)
break;
}
+ trace_macio_timer_read(addr, size, value);
return value;
}
diff --git a/hw/misc/macio/trace-events b/hw/misc/macio/trace-events
index 24c0a36..d499d78 100644
--- a/hw/misc/macio/trace-events
+++ b/hw/misc/macio/trace-events
@@ -9,3 +9,7 @@ cuda_packet_receive(int len) "length %d"
cuda_packet_receive_data(int i, const uint8_t data) "[%d] 0x%02x"
cuda_packet_send(int len) "length %d"
cuda_packet_send_data(int i, const uint8_t data) "[%d] 0x%02x"
+
+# hw/misc/macio/macio.c
+macio_timer_write(uint64_t addr, unsigned len, uint64_t val) "write addr 0x%"PRIx64 " len %d val 0x%"PRIx64
+macio_timer_read(uint64_t addr, unsigned len, uint32_t val) "read addr 0x%"PRIx64 " len %d val 0x%"PRIx32
diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522.c
index 6163cea..44eb306 100644
--- a/hw/misc/mos6522.c
+++ b/hw/misc/mos6522.c
@@ -189,12 +189,12 @@ static uint64_t mos6522_get_load_time(MOS6522State *s, MOS6522Timer *ti)
static void mos6522_portA_write(MOS6522State *s)
{
- qemu_log_mask(LOG_UNIMP, "portA_write unimplemented");
+ qemu_log_mask(LOG_UNIMP, "portA_write unimplemented\n");
}
static void mos6522_portB_write(MOS6522State *s)
{
- qemu_log_mask(LOG_UNIMP, "portB_write unimplemented");
+ qemu_log_mask(LOG_UNIMP, "portB_write unimplemented\n");
}
uint64_t mos6522_read(void *opaque, hwaddr addr, unsigned size)
@@ -369,13 +369,6 @@ static const MemoryRegionOps mos6522_ops = {
},
};
-static bool mos6522_timer_exist(void *opaque, int version_id)
-{
- MOS6522Timer *s = opaque;
-
- return s->timer != NULL;
-}
-
static const VMStateDescription vmstate_mos6522_timer = {
.name = "mos6522_timer",
.version_id = 0,
@@ -385,12 +378,12 @@ static const VMStateDescription vmstate_mos6522_timer = {
VMSTATE_UINT16(counter_value, MOS6522Timer),
VMSTATE_INT64(load_time, MOS6522Timer),
VMSTATE_INT64(next_irq_time, MOS6522Timer),
- VMSTATE_TIMER_PTR_TEST(timer, MOS6522Timer, mos6522_timer_exist),
+ VMSTATE_TIMER_PTR(timer, MOS6522Timer),
VMSTATE_END_OF_LIST()
}
};
-static const VMStateDescription vmstate_mos6522 = {
+const VMStateDescription vmstate_mos6522 = {
.name = "mos6522",
.version_id = 0,
.minimum_version_id = 0,
@@ -405,7 +398,7 @@ static const VMStateDescription vmstate_mos6522 = {
VMSTATE_UINT8(ifr, MOS6522State),
VMSTATE_UINT8(ier, MOS6522State),
VMSTATE_UINT8(anh, MOS6522State),
- VMSTATE_STRUCT_ARRAY(timers, MOS6522State, 2, 1,
+ VMSTATE_STRUCT_ARRAY(timers, MOS6522State, 2, 0,
vmstate_mos6522_timer, MOS6522Timer),
VMSTATE_END_OF_LIST()
}
@@ -427,18 +420,12 @@ static void mos6522_reset(DeviceState *dev)
/* s->ier = T1_INT | SR_INT; */
s->anh = 0;
+ s->timers[0].frequency = s->frequency;
s->timers[0].latch = 0xffff;
set_counter(s, &s->timers[0], 0xffff);
- s->timers[1].latch = 0xffff;
-}
-
-static void mos6522_realize(DeviceState *dev, Error **errp)
-{
- MOS6522State *s = MOS6522(dev);
-
- s->timers[0].frequency = s->frequency;
s->timers[1].frequency = s->frequency;
+ s->timers[1].latch = 0xffff;
}
static void mos6522_init(Object *obj)
@@ -469,11 +456,10 @@ static void mos6522_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
MOS6522DeviceClass *mdc = MOS6522_DEVICE_CLASS(oc);
- dc->realize = mos6522_realize;
dc->reset = mos6522_reset;
dc->vmsd = &vmstate_mos6522;
dc->props = mos6522_properties;
- mdc->parent_realize = dc->realize;
+ mdc->parent_reset = dc->reset;
mdc->set_sr_int = mos6522_set_sr_int;
mdc->portB_write = mos6522_portB_write;
mdc->portA_write = mos6522_portA_write;