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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-04-03 19:47:55 +0000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-05-11 09:53:41 +0100 |
| commit | f0f43534f7f5beb92788951da6944faad154c6a2 (patch) | |
| tree | cedd432cc828563a3b67ff68e26b3ff793925aa5 /hw/misc/sifive_u_prci.c | |
| parent | 3dedb7201c292d340ac73fb0e52179e3690fb0c8 (diff) | |
| download | qemu-f0f43534f7f5beb92788951da6944faad154c6a2.zip qemu-f0f43534f7f5beb92788951da6944faad154c6a2.tar.gz qemu-f0f43534f7f5beb92788951da6944faad154c6a2.tar.bz2 | |
tcg/riscv: Simplify constraints on qemu_ld/st
The softmmu tlb uses TCG_REG_TMP[0-2], not any of the normally available
registers. Now that we handle overlap betwen inputs and helper arguments,
we can allow any allocatable reg.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'hw/misc/sifive_u_prci.c')
0 files changed, 0 insertions, 0 deletions