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| author | Max Filippov <jcmvbkbc@gmail.com> | 2020-06-30 14:52:25 -0700 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2020-08-21 12:48:15 -0700 |
| commit | e95ef43181b49a401d163729d0d96f304525dfe7 (patch) | |
| tree | 17b1eec6333d72b90f255cc3f2ba9c4b86349421 /hw/misc/mips_cpc.c | |
| parent | 6ac269c33cd50679ed37b0bafcef0a95b76b1543 (diff) | |
| download | qemu-e95ef43181b49a401d163729d0d96f304525dfe7.zip qemu-e95ef43181b49a401d163729d0d96f304525dfe7.tar.gz qemu-e95ef43181b49a401d163729d0d96f304525dfe7.tar.bz2 | |
tests/tcg/xtensa: update test_fp0_arith for DFPU
DFPU arithmetic opcodes update FSR flags. Add FSR parameters and
expected FSR register values for the arithmetic tests.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'hw/misc/mips_cpc.c')
0 files changed, 0 insertions, 0 deletions