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| author | Nicholas Piggin <npiggin@gmail.com> | 2023-05-15 19:26:47 +1000 |
|---|---|---|
| committer | Daniel Henrique Barboza <danielhb413@gmail.com> | 2023-05-27 08:25:19 -0300 |
| commit | fbda88f7abdeed3ceebdd18de6909a52df756c1c (patch) | |
| tree | 1a2e29eb8df6468a97fbc67d03c19644e3033ef1 /hw/misc/iotkit-sysinfo.c | |
| parent | 5260ecffd24e36c029849f379c8b9cc3d099c879 (diff) | |
| download | qemu-fbda88f7abdeed3ceebdd18de6909a52df756c1c.zip qemu-fbda88f7abdeed3ceebdd18de6909a52df756c1c.tar.gz qemu-fbda88f7abdeed3ceebdd18de6909a52df756c1c.tar.bz2 | |
target/ppc: Fix width of some 32-bit SPRs
Some 32-bit SPRs are incorrectly implemented as 64-bits on 64-bit
targets.
This changes VRSAVE, DSISR, HDSISR, DAWRX0, PIDR, LPIDR, DEXCR,
HDEXCR, CTRL, TSCR, MMCRH, and PMC[1-6] from to be 32-bit registers.
This only goes by the 32/64 classification in the architecture, it
does not try to implement finer details of SPR implementation (e.g.,
not all bits implemented as simple read/write storage).
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Message-Id: <20230515092655.171206-2-npiggin@gmail.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'hw/misc/iotkit-sysinfo.c')
0 files changed, 0 insertions, 0 deletions