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| author | Peter Maydell <peter.maydell@linaro.org> | 2024-08-30 18:34:50 +0100 |
|---|---|---|
| committer | Thomas Huth <huth@tuxfamily.org> | 2024-09-08 11:35:43 +0200 |
| commit | c3ade30ac1dd8f4b54928309570ab3513905e65a (patch) | |
| tree | 56038038dc8e89d09d75a5c2f68cdfbec4aa2b3b /hw/m68k | |
| parent | 1581a0bc928d61230ed6e43bcb83f2f6737d0bc0 (diff) | |
| download | qemu-c3ade30ac1dd8f4b54928309570ab3513905e65a.zip qemu-c3ade30ac1dd8f4b54928309570ab3513905e65a.tar.gz qemu-c3ade30ac1dd8f4b54928309570ab3513905e65a.tar.bz2 | |
hw/m68k/mcf5208: Avoid shifting off end of integer
In m5208_sys_read(), we have a loop of n from 0 to 31, and we
calculate (2u << n). For the n == 31 iteration this will shift off
the top of the unsigned 32 bit integer.
This is harmless, because we're going to stop the loop with n == 31
anyway, but we can avoid the error by using 64-bit arithmetic here.
(The SDCS0 register is documented at
https://www.nxp.com/docs/en/reference-manual/MCF5208RM.pdf
section 18.4.5; we want the lower 5 bits to indicate the
RAM size, where 31 == 4GB, 30 == 2GB, and so on down.
As it happens, the layout of the mcf5208evb board memory map
means it doesn't make sense to have more than 1GB of RAM
in any case.)
Resolves: Coverity CID 1547727
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
Message-ID: <20240830173452.2086140-2-peter.maydell@linaro.org>
Signed-off-by: Thomas Huth <huth@tuxfamily.org>
Diffstat (limited to 'hw/m68k')
| -rw-r--r-- | hw/m68k/mcf5208.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c index ec14096..0ad347d 100644 --- a/hw/m68k/mcf5208.c +++ b/hw/m68k/mcf5208.c @@ -158,7 +158,7 @@ static uint64_t m5208_sys_read(void *opaque, hwaddr addr, { int n; for (n = 0; n < 32; n++) { - if (current_machine->ram_size < (2u << n)) { + if (current_machine->ram_size < (2ULL << n)) { break; } } |