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| author | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2022-03-05 15:09:56 +0000 |
|---|---|---|
| committer | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2022-03-09 09:28:28 +0000 |
| commit | b793b4ef8c862891c716cd163aaa7e4af0d697da (patch) | |
| tree | 1e67cac8ca64381fe32c6146edf09756cfa0f4ff /hw/m68k | |
| parent | 677a4725b1c49b139b00d8eaa932676ed8620931 (diff) | |
| download | qemu-b793b4ef8c862891c716cd163aaa7e4af0d697da.zip qemu-b793b4ef8c862891c716cd163aaa7e4af0d697da.tar.gz qemu-b793b4ef8c862891c716cd163aaa7e4af0d697da.tar.bz2 | |
mos6522: implement edge-triggering for CA1/2 and CB1/2 control line IRQs
The mos6522 datasheet describes how the control lines IRQs are edge-triggered
according to the configuration in the PCR register. Implement the logic according
to the datasheet so that the interrupt bits in IFR are latched when the edge is
detected, and cleared when reading portA/portB or writing to IFR as necessary.
To maintain bisectibility this change also updates the SCSI, SCSI data, Nubus
and VIA2 60Hz/1Hz clocks in the q800 machine to be negative edge-triggered as
confirmed by the PCR programming in all of Linux, NetBSD and MacOS.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20220305150957.5053-12-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Diffstat (limited to 'hw/m68k')
| -rw-r--r-- | hw/m68k/q800.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index 55dfe50..66ca5c0 100644 --- a/hw/m68k/q800.c +++ b/hw/m68k/q800.c @@ -533,10 +533,11 @@ static void q800_init(MachineState *machine) sysbus = SYS_BUS_DEVICE(dev); sysbus_realize_and_unref(sysbus, &error_fatal); - sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(via2_dev, - VIA2_IRQ_SCSI_BIT)); - sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(via2_dev, - VIA2_IRQ_SCSI_DATA_BIT)); + /* SCSI and SCSI data IRQs are negative edge triggered */ + sysbus_connect_irq(sysbus, 0, qemu_irq_invert(qdev_get_gpio_in(via2_dev, + VIA2_IRQ_SCSI_BIT))); + sysbus_connect_irq(sysbus, 1, qemu_irq_invert(qdev_get_gpio_in(via2_dev, + VIA2_IRQ_SCSI_DATA_BIT))); sysbus_mmio_map(sysbus, 0, ESP_BASE); sysbus_mmio_map(sysbus, 1, ESP_PDMA); |