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authorPhilippe Mathieu-Daudé <philmd@linaro.org>2023-10-24 10:30:05 +0200
committerThomas Huth <huth@tuxfamily.org>2023-11-01 07:20:34 +0100
commit989c8a46cc9ec211b94c4dfa0f8fd8662ab697da (patch)
tree8f02871af52c8db2adc6a64fc092557c0e35ea8e /hw/m68k/an5206.c
parentb8fc6195504dfeca2d283f356e7c13a6fd391acb (diff)
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hw/m68k/mcf5206: Pass CPU using QOM link property
Avoid the interrupt controller directly access the first cpu via the qemu_get_cpu() call. Pass it as argument to mcf5206_init() from the board code. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231024083010.12453-3-philmd@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
Diffstat (limited to 'hw/m68k/an5206.c')
-rw-r--r--hw/m68k/an5206.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/hw/m68k/an5206.c b/hw/m68k/an5206.c
index 11ae4c9..1e8e64f 100644
--- a/hw/m68k/an5206.c
+++ b/hw/m68k/an5206.c
@@ -20,12 +20,14 @@
#define AN5206_MBAR_ADDR 0x10000000
#define AN5206_RAMBAR_ADDR 0x20000000
-static void mcf5206_init(MemoryRegion *sysmem, uint32_t base)
+static void mcf5206_init(M68kCPU *cpu, MemoryRegion *sysmem, uint32_t base)
{
DeviceState *dev;
SysBusDevice *s;
dev = qdev_new(TYPE_MCF5206_MBAR);
+ object_property_set_link(OBJECT(dev), "m68k-cpu",
+ OBJECT(cpu), &error_abort);
s = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(s, &error_fatal);
@@ -60,7 +62,7 @@ static void an5206_init(MachineState *machine)
memory_region_init_ram(sram, NULL, "an5206.sram", 512, &error_fatal);
memory_region_add_subregion(address_space_mem, AN5206_RAMBAR_ADDR, sram);
- mcf5206_init(address_space_mem, AN5206_MBAR_ADDR);
+ mcf5206_init(cpu, address_space_mem, AN5206_MBAR_ADDR);
/* Load kernel. */
if (!kernel_filename) {