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| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2022-10-26 21:06:36 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2023-01-13 09:32:32 +0100 |
| commit | c12b1e67d50c01f6ba78abcdaaa533abaf71b664 (patch) | |
| tree | 2326cfa24d95d05c9b2bd7ade95361b1903b0b81 /hw/isa | |
| parent | 1953dfa80e0fc44a8ccfc97b4ada941e9383bba7 (diff) | |
| download | qemu-c12b1e67d50c01f6ba78abcdaaa533abaf71b664.zip qemu-c12b1e67d50c01f6ba78abcdaaa533abaf71b664.tar.gz qemu-c12b1e67d50c01f6ba78abcdaaa533abaf71b664.tar.bz2 | |
hw/isa/piix4: Correct IRQRC[A:D] reset values
IRQRC[A:D] registers reset value is 0x80. We were forcing
the MIPS Malta machine routing to be able to boot a Linux
kernel without any bootloader.
We now have these registers initialized in the Malta machine
write_bootloader(), so we can use the correct reset values.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20221027204720.33611-4-philmd@linaro.org>
Diffstat (limited to 'hw/isa')
| -rw-r--r-- | hw/isa/piix4.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 8fc1db6..0d23e11 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -116,10 +116,10 @@ static void piix4_isa_reset(DeviceState *dev) pci_conf[0x4c] = 0x4d; pci_conf[0x4e] = 0x03; pci_conf[0x4f] = 0x00; - pci_conf[0x60] = 0x0a; // PCI A -> IRQ 10 - pci_conf[0x61] = 0x0a; // PCI B -> IRQ 10 - pci_conf[0x62] = 0x0b; // PCI C -> IRQ 11 - pci_conf[0x63] = 0x0b; // PCI D -> IRQ 11 + pci_conf[0x60] = 0x80; + pci_conf[0x61] = 0x80; + pci_conf[0x62] = 0x80; + pci_conf[0x63] = 0x80; pci_conf[0x69] = 0x02; pci_conf[0x70] = 0x80; pci_conf[0x76] = 0x0c; |