diff options
author | Paolo Bonzini <pbonzini@redhat.com> | 2016-06-23 07:49:16 +0200 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2016-06-29 14:03:48 +0200 |
commit | 6d356c8c9e36bd532d14b940ad17ca2f37a2ee71 (patch) | |
tree | ddca8ab158ff60131f1f853d88942207a47e4dde /hw/isa | |
parent | 9f34a35e0020b0b2b2e21c086a486d7dfd18df4f (diff) | |
download | qemu-6d356c8c9e36bd532d14b940ad17ca2f37a2ee71.zip qemu-6d356c8c9e36bd532d14b940ad17ca2f37a2ee71.tar.gz qemu-6d356c8c9e36bd532d14b940ad17ca2f37a2ee71.tar.bz2 |
ich9: implement ACPI_EN register
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'hw/isa')
-rw-r--r-- | hw/isa/lpc_ich9.c | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c index fe0ba83..f8e6fb8 100644 --- a/hw/isa/lpc_ich9.c +++ b/hw/isa/lpc_ich9.c @@ -394,10 +394,16 @@ static void ich9_apm_ctrl_changed(uint32_t val, void *arg) /* config:PMBASE */ static void -ich9_lpc_pmbase_update(ICH9LPCState *lpc) +ich9_lpc_pmbase_sci_update(ICH9LPCState *lpc) { uint32_t pm_io_base = pci_get_long(lpc->d.config + ICH9_LPC_PMBASE); - pm_io_base &= ICH9_LPC_PMBASE_BASE_ADDRESS_MASK; + uint8_t acpi_cntl = pci_get_long(lpc->d.config + ICH9_LPC_ACPI_CTRL); + + if (acpi_cntl & ICH9_LPC_ACPI_CTRL_ACPI_EN) { + pm_io_base &= ICH9_LPC_PMBASE_BASE_ADDRESS_MASK; + } else { + pm_io_base = 0; + } ich9_pm_iospace_update(&lpc->pm, pm_io_base); } @@ -449,7 +455,8 @@ static void ich9_lpc_config_write(PCIDevice *d, uint32_t rcba_old = pci_get_long(d->config + ICH9_LPC_RCBA); pci_default_write_config(d, addr, val, len); - if (ranges_overlap(addr, len, ICH9_LPC_PMBASE, 4)) { + if (ranges_overlap(addr, len, ICH9_LPC_PMBASE, 4) || + ranges_overlap(addr, len, ICH9_LPC_ACPI_CTRL, 1)) { ich9_lpc_pmbase_update(lpc); } if (ranges_overlap(addr, len, ICH9_LPC_RCBA, 4)) { @@ -610,6 +617,8 @@ static void ich9_lpc_realize(PCIDevice *d, Error **errp) pci_set_long(d->wmask + ICH9_LPC_PMBASE, ICH9_LPC_PMBASE_BASE_ADDRESS_MASK); + pci_set_byte(d->wmask + ICH9_LPC_PMBASE, + ICH9_LPC_ACPI_CTRL_ACPI_EN); memory_region_init_io(&lpc->rcrb_mem, OBJECT(d), &rcrb_mmio_ops, lpc, "lpc-rcrb-mmio", ICH9_CC_SIZE); |