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author | Bernhard Beschow <shentey@gmail.com> | 2023-10-07 14:38:18 +0200 |
---|---|---|
committer | Michael S. Tsirkin <mst@redhat.com> | 2023-10-22 05:18:16 -0400 |
commit | 56b1f50e3c101bfe5f52bac73de0e88438de11bd (patch) | |
tree | 562a16134de6d537ce29ea2a5c7c65ec0e0bbfd9 /hw/isa/piix3.c | |
parent | 64127940aeb674cb5d9d8d0ea4ca20591bf2b010 (diff) | |
download | qemu-56b1f50e3c101bfe5f52bac73de0e88438de11bd.zip qemu-56b1f50e3c101bfe5f52bac73de0e88438de11bd.tar.gz qemu-56b1f50e3c101bfe5f52bac73de0e88438de11bd.tar.bz2 |
hw/i386/pc: Wire RTC ISA IRQs in south bridges
Makes the south bridges a bit more self-contained and aligns PIIX3 more with
PIIX4. The latter is needed for consolidating the PIIX south bridges.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20231007123843.127151-11-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/isa/piix3.c')
-rw-r--r-- | hw/isa/piix3.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index 3e7c42f..11d72ca 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -266,6 +266,7 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp) { PIIX3State *d = PIIX3_PCI_DEVICE(dev); ISABus *isa_bus; + uint32_t irq; isa_bus = isa_bus_new(DEVICE(d), pci_address_space(dev), pci_address_space_io(dev), errp); @@ -287,6 +288,8 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp) if (!qdev_realize(DEVICE(&d->rtc), BUS(isa_bus), errp)) { return; } + irq = object_property_get_uint(OBJECT(&d->rtc), "irq", &error_fatal); + isa_connect_gpio_out(ISA_DEVICE(&d->rtc), 0, irq); } static void build_pci_isa_aml(AcpiDevAmlIf *adev, Aml *scope) |