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author | Jean-Christophe Dubois <jcd@tribudubois.net> | 2015-08-13 11:26:19 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2015-08-13 11:26:19 +0100 |
commit | f250c6a7510e0069fdc7fd1fb76700db4daa9ddd (patch) | |
tree | 04899252a436d32e4bcb17172a012bbefb926342 /hw/intc | |
parent | fa2650a37e58877d889a726a47aadbf4578ef87e (diff) | |
download | qemu-f250c6a7510e0069fdc7fd1fb76700db4daa9ddd.zip qemu-f250c6a7510e0069fdc7fd1fb76700db4daa9ddd.tar.gz qemu-f250c6a7510e0069fdc7fd1fb76700db4daa9ddd.tar.bz2 |
i.MX: Split AVIC emulator in a header file and a source file
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 06829257e845d693be05c7d491134313c1615d1a.1437080501.git.jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/intc')
-rw-r--r-- | hw/intc/imx_avic.c | 40 |
1 files changed, 3 insertions, 37 deletions
diff --git a/hw/intc/imx_avic.c b/hw/intc/imx_avic.c index e48f66c..c5eecb5 100644 --- a/hw/intc/imx_avic.c +++ b/hw/intc/imx_avic.c @@ -7,6 +7,7 @@ * Copyright (c) 2008 OKL * Copyright (c) 2011 NICTA Pty Ltd * Originally written by Hans Jiang + * Updated by Jean-Christophe Dubois <jcd@tribudubois.net> * * This code is licensed under the GPL version 2 or later. See * the COPYING file in the top-level directory. @@ -14,9 +15,7 @@ * TODO: implement vectors. */ -#include "hw/hw.h" -#include "hw/sysbus.h" -#include "qemu/host-utils.h" +#include "hw/intc/imx_avic.h" #define DEBUG_INT 1 #undef DEBUG_INT /* comment out for debugging */ @@ -40,39 +39,6 @@ do { printf("imx_avic: " fmt , ##args); } while (0) # define IPRINTF(fmt, args...) do {} while (0) #endif -#define IMX_AVIC_NUM_IRQS 64 - -/* Interrupt Control Bits */ -#define ABFLAG (1<<25) -#define ABFEN (1<<24) -#define NIDIS (1<<22) /* Normal Interrupt disable */ -#define FIDIS (1<<21) /* Fast interrupt disable */ -#define NIAD (1<<20) /* Normal Interrupt Arbiter Rise ARM level */ -#define FIAD (1<<19) /* Fast Interrupt Arbiter Rise ARM level */ -#define NM (1<<18) /* Normal interrupt mode */ - - -#define PRIO_PER_WORD (sizeof(uint32_t) * 8 / 4) -#define PRIO_WORDS (IMX_AVIC_NUM_IRQS/PRIO_PER_WORD) - -#define TYPE_IMX_AVIC "imx_avic" -#define IMX_AVIC(obj) \ - OBJECT_CHECK(IMXAVICState, (obj), TYPE_IMX_AVIC) - -typedef struct IMXAVICState { - SysBusDevice parent_obj; - - MemoryRegion iomem; - uint64_t pending; - uint64_t enabled; - uint64_t is_fiq; - uint32_t intcntl; - uint32_t intmask; - qemu_irq irq; - qemu_irq fiq; - uint32_t prio[PRIO_WORDS]; /* Priorities are 4-bits each */ -} IMXAVICState; - static const VMStateDescription vmstate_imx_avic = { .name = "imx-avic", .version_id = 1, @@ -370,7 +336,7 @@ static int imx_avic_init(SysBusDevice *sbd) IMXAVICState *s = IMX_AVIC(dev); memory_region_init_io(&s->iomem, OBJECT(s), &imx_avic_ops, s, - "imx_avic", 0x1000); + TYPE_IMX_AVIC, 0x1000); sysbus_init_mmio(sbd, &s->iomem); qdev_init_gpio_in(dev, imx_avic_set_irq, IMX_AVIC_NUM_IRQS); |