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| author | Christophe Lyon <christophe.lyon@linaro.org> | 2019-12-02 17:35:10 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-12-16 10:46:34 +0000 |
| commit | cf7beda5072e106ddce875c1996446540c5fe239 (patch) | |
| tree | 21bad901fb2aa6d00d720318086f4669766d909f /hw/intc | |
| parent | 084a398bf8aa7634738e6c6c0103236ee1b3b72f (diff) | |
| download | qemu-cf7beda5072e106ddce875c1996446540c5fe239.zip qemu-cf7beda5072e106ddce875c1996446540c5fe239.tar.gz qemu-cf7beda5072e106ddce875c1996446540c5fe239.tar.bz2 | |
target/arm: Add support for cortex-m7 CPU
This is derived from cortex-m4 description, adding DP support and FPv5
instructions with the corresponding flags in isar and mvfr2.
Checked that it could successfully execute
vrinta.f32 s15, s15
while cortex-m4 emulation rejects it with "illegal instruction".
Signed-off-by: Christophe Lyon <christophe.lyon@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20191025090841.10299-1-christophe.lyon@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/intc')
0 files changed, 0 insertions, 0 deletions