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| author | Peter Maydell <peter.maydell@linaro.org> | 2017-11-21 09:56:05 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2017-11-21 09:56:05 +0000 |
| commit | 5f49d73cb3c571e1503b86a9014d2908b2036d03 (patch) | |
| tree | 594ba8452abeeaf3a4a0765e80c1ce115fd9ecfe /hw/intc | |
| parent | 3da87f771311199e9b915163315ba0e9b96c6d1b (diff) | |
| parent | b350ae138fcb062f49904f5115cc5fe188a02906 (diff) | |
| download | qemu-5f49d73cb3c571e1503b86a9014d2908b2036d03.zip qemu-5f49d73cb3c571e1503b86a9014d2908b2036d03.tar.gz qemu-5f49d73cb3c571e1503b86a9014d2908b2036d03.tar.bz2 | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20171120' into staging
target-arm queue:
* hw/arm: Silence xlnx-ep108 deprecation warning during tests
* hw/arm/aspeed: Unlock SCU when running kernel
* arm: check regime, not current state, for ATS write PAR format
* nvic: Fix ARMv7M MPU_RBAR reads
* target/arm: Report GICv3 sysregs present in ID registers if needed
# gpg: Signature made Mon 20 Nov 2017 17:35:25 GMT
# gpg: using RSA key 0x3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg: aka "Peter Maydell <pmaydell@gmail.com>"
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20171120:
hw/arm: Silence xlnx-ep108 deprecation warning during tests
hw/arm/aspeed: Unlock SCU when running kernel
arm: check regime, not current state, for ATS write PAR format
nvic: Fix ARMv7M MPU_RBAR reads
target/arm: Report GICv3 sysregs present in ID registers if needed
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/intc')
| -rw-r--r-- | hw/intc/armv7m_nvic.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c index be46639..5d9c883 100644 --- a/hw/intc/armv7m_nvic.c +++ b/hw/intc/armv7m_nvic.c @@ -977,7 +977,7 @@ static uint32_t nvic_readl(NVICState *s, uint32_t offset, MemTxAttrs attrs) if (region >= cpu->pmsav7_dregion) { return 0; } - return (cpu->env.pmsav7.drbar[region] & 0x1f) | (region & 0xf); + return (cpu->env.pmsav7.drbar[region] & ~0x1f) | (region & 0xf); } case 0xda0: /* MPU_RASR (v7M), MPU_RLAR (v8M) */ case 0xda8: /* MPU_RASR_A1 (v7M), MPU_RLAR_A1 (v8M) */ |