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author | Alexander Graf <agraf@suse.de> | 2017-07-11 11:21:26 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2017-07-11 11:21:26 +0100 |
commit | 5d721b785fbe80170fc756e9444cf751d3a47568 (patch) | |
tree | bfd169dc02c4d5550e1714e436eff3174817a0be /hw/intc | |
parent | f986ee1d43004a336197ee012e901f44bba04785 (diff) | |
download | qemu-5d721b785fbe80170fc756e9444cf751d3a47568.zip qemu-5d721b785fbe80170fc756e9444cf751d3a47568.tar.gz qemu-5d721b785fbe80170fc756e9444cf751d3a47568.tar.bz2 |
ARM: KVM: Enable in-kernel timers with user space gic
When running with KVM enabled, you can choose between emulating the
gic in kernel or user space. If the kernel supports in-kernel virtualization
of the interrupt controller, it will default to that. If not, if will
default to user space emulation.
Unfortunately when running in user mode gic emulation, we miss out on
interrupt events which are only available from kernel space, such as the timer.
This patch leverages the new kernel/user space pending line synchronization for
timer events. It does not handle PMU events yet.
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Message-id: 1498577737-130264-1-git-send-email-agraf@suse.de
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/intc')
-rw-r--r-- | hw/intc/arm_gic.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index b305d90..5a0e2a3 100644 --- a/hw/intc/arm_gic.c +++ b/hw/intc/arm_gic.c @@ -25,6 +25,7 @@ #include "qom/cpu.h" #include "qemu/log.h" #include "trace.h" +#include "sysemu/kvm.h" /* #define DEBUG_GIC */ @@ -1412,6 +1413,12 @@ static void arm_gic_realize(DeviceState *dev, Error **errp) return; } + if (kvm_enabled() && !kvm_arm_supports_user_irq()) { + error_setg(errp, "KVM with user space irqchip only works when the " + "host kernel supports KVM_CAP_ARM_USER_IRQ"); + return; + } + /* This creates distributor and main CPU interface (s->cpuiomem[0]) */ gic_init_irqs_and_mmio(s, gic_set_irq, gic_ops); |