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authorDavid Gibson <david@gibson.dropbear.id.au>2019-09-26 14:31:13 +1000
committerDavid Gibson <david@gibson.dropbear.id.au>2019-10-24 09:36:55 +1100
commit0b0e52b1317f2a51704cbf32047864869763dea3 (patch)
treef9f61d37e83f088f2b13efb52a6296d83a1a3409 /hw/intc
parentebd6be089b4c87554362b516c3ba530217d3f3db (diff)
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spapr, xics, xive: Move irq claim and free from SpaprIrq to SpaprInterruptController
These methods, like cpu_intc_create, really belong to the interrupt controller, but need to be called on all possible intcs. Like cpu_intc_create, therefore, make them methods on the intc and always call it for all existing intcs. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'hw/intc')
-rw-r--r--hw/intc/spapr_xive.c71
-rw-r--r--hw/intc/xics_spapr.c29
2 files changed, 67 insertions, 33 deletions
diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c
index 9338dab..ff1a175 100644
--- a/hw/intc/spapr_xive.c
+++ b/hw/intc/spapr_xive.c
@@ -487,6 +487,42 @@ static const VMStateDescription vmstate_spapr_xive = {
},
};
+static int spapr_xive_claim_irq(SpaprInterruptController *intc, int lisn,
+ bool lsi, Error **errp)
+{
+ SpaprXive *xive = SPAPR_XIVE(intc);
+ XiveSource *xsrc = &xive->source;
+
+ assert(lisn < xive->nr_irqs);
+
+ if (xive_eas_is_valid(&xive->eat[lisn])) {
+ error_setg(errp, "IRQ %d is not free", lisn);
+ return -EBUSY;
+ }
+
+ /*
+ * Set default values when allocating an IRQ number
+ */
+ xive->eat[lisn].w |= cpu_to_be64(EAS_VALID | EAS_MASKED);
+ if (lsi) {
+ xive_source_irq_set_lsi(xsrc, lisn);
+ }
+
+ if (kvm_irqchip_in_kernel()) {
+ return kvmppc_xive_source_reset_one(xsrc, lisn, errp);
+ }
+
+ return 0;
+}
+
+static void spapr_xive_free_irq(SpaprInterruptController *intc, int lisn)
+{
+ SpaprXive *xive = SPAPR_XIVE(intc);
+ assert(lisn < xive->nr_irqs);
+
+ xive->eat[lisn].w &= cpu_to_be64(~EAS_VALID);
+}
+
static Property spapr_xive_properties[] = {
DEFINE_PROP_UINT32("nr-irqs", SpaprXive, nr_irqs, 0),
DEFINE_PROP_UINT32("nr-ends", SpaprXive, nr_ends, 0),
@@ -536,6 +572,8 @@ static void spapr_xive_class_init(ObjectClass *klass, void *data)
xrc->get_tctx = spapr_xive_get_tctx;
sicc->cpu_intc_create = spapr_xive_cpu_intc_create;
+ sicc->claim_irq = spapr_xive_claim_irq;
+ sicc->free_irq = spapr_xive_free_irq;
}
static const TypeInfo spapr_xive_info = {
@@ -557,39 +595,6 @@ static void spapr_xive_register_types(void)
type_init(spapr_xive_register_types)
-int spapr_xive_irq_claim(SpaprXive *xive, int lisn, bool lsi, Error **errp)
-{
- XiveSource *xsrc = &xive->source;
-
- assert(lisn < xive->nr_irqs);
-
- if (xive_eas_is_valid(&xive->eat[lisn])) {
- error_setg(errp, "IRQ %d is not free", lisn);
- return -EBUSY;
- }
-
- /*
- * Set default values when allocating an IRQ number
- */
- xive->eat[lisn].w |= cpu_to_be64(EAS_VALID | EAS_MASKED);
- if (lsi) {
- xive_source_irq_set_lsi(xsrc, lisn);
- }
-
- if (kvm_irqchip_in_kernel()) {
- return kvmppc_xive_source_reset_one(xsrc, lisn, errp);
- }
-
- return 0;
-}
-
-void spapr_xive_irq_free(SpaprXive *xive, int lisn)
-{
- assert(lisn < xive->nr_irqs);
-
- xive->eat[lisn].w &= cpu_to_be64(~EAS_VALID);
-}
-
/*
* XIVE hcalls
*
diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c
index 946311b..224fe1e 100644
--- a/hw/intc/xics_spapr.c
+++ b/hw/intc/xics_spapr.c
@@ -346,6 +346,33 @@ static int xics_spapr_cpu_intc_create(SpaprInterruptController *intc,
return 0;
}
+static int xics_spapr_claim_irq(SpaprInterruptController *intc, int irq,
+ bool lsi, Error **errp)
+{
+ ICSState *ics = ICS_SPAPR(intc);
+
+ assert(ics);
+ assert(ics_valid_irq(ics, irq));
+
+ if (!ics_irq_free(ics, irq - ics->offset)) {
+ error_setg(errp, "IRQ %d is not free", irq);
+ return -EBUSY;
+ }
+
+ ics_set_irq_type(ics, irq - ics->offset, lsi);
+ return 0;
+}
+
+static void xics_spapr_free_irq(SpaprInterruptController *intc, int irq)
+{
+ ICSState *ics = ICS_SPAPR(intc);
+ uint32_t srcno = irq - ics->offset;
+
+ assert(ics_valid_irq(ics, irq));
+
+ memset(&ics->irqs[srcno], 0, sizeof(ICSIRQState));
+}
+
static void ics_spapr_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -355,6 +382,8 @@ static void ics_spapr_class_init(ObjectClass *klass, void *data)
device_class_set_parent_realize(dc, ics_spapr_realize,
&isc->parent_realize);
sicc->cpu_intc_create = xics_spapr_cpu_intc_create;
+ sicc->claim_irq = xics_spapr_claim_irq;
+ sicc->free_irq = xics_spapr_free_irq;
}
static const TypeInfo ics_spapr_info = {