Merge tag 'accel-20230628' of https://github.com/philmd/qemu into staging

Accelerators patches

- MAINTAINERS: Update Roman Bolshakov email address
- HAX: Fix a memory leak
- HAX/NVMM/WHPX/HVF: Rename per-accel state as AccelCPUState
- KVM: Restrict specific fields from ArchCPU
- WHPX: Re-enable cross-build gitlab-ci job on case sensitive filesystems
- WHPX: Fix error message when setting ProcessorCount fails
- exec/memory: Add definitions for memory listener priorities

# -----BEGIN PGP SIGNATURE-----
#
# iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmScVtkACgkQ4+MsLN6t
# wN7p8A//RXuX9gLFT35zx+5axocU3/XBbCsQWSvzzkYoXxmC/TLxvivO66NPGMc0
# C76b1FJUoLS/u9SyJUeIeYkL0rjkzARUKcRpiJXM21WM6ou8Nkz0kuI4ouowt+4K
# i/4chTjxlN5/4PKlHHcX9ZUJ9acVj01zO1BCuj/bVsxO6WMT1kjL+kplVxxFR3aW
# tlbYtUT3v4xmp94FfE2Q9lR25z4usrGnmz2rchaadlVc43kmsNcQRx+EoUdi148n
# lkViRR90sacYPX586s2yxhPpUdtrXjJmEdX0X00urdPqljkRxekHtyTqG4CRZi+K
# hG5NztK7p37GNNXZroL0gpHyr9IX6hZ3o8rmN3IiCOGU6BgQBRUhvvG2sblwcJ1A
# SSiBK4RWtgyIGWt4U6PgVj8IAu55JuqT5xR2r34fH/zccxXlp/B13vadGs7TUK15
# oHDUT4GnKL2R29lVFTl95BzsxwaMtbB9w01CLJk8va2T/97eqtFgvJyuVC9vZb0N
# 41u2RkinaQZ+hbq9TP1G21zpG0eyucEMIQ6loUd7+G3KJFjFfB4JzE2VDm0Y/OVy
# 77cEEQ67wts29fMNSqqPIQCMttDrNj7JqMMknGBQS2iHPgF+B3KjwIjnRaMBt73I
# CKPITOJPmb+kvIUsK3KlONdicEG57cBxFBTZW5+P9pJXF5izrAY=
# =b9hj
# -----END PGP SIGNATURE-----
# gpg: Signature made Wed 28 Jun 2023 05:50:49 PM CEST
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]

* tag 'accel-20230628' of https://github.com/philmd/qemu: (30 commits)
  exec/memory: Add symbol for the min value of memory listener priority
  exec/memory: Add symbol for memory listener priority for device backend
  exec/memory: Add symbolic value for memory listener priority for accel
  target/i386/WHPX: Fix error message when fail to set ProcessorCount
  target/riscv: Restrict KVM-specific fields from ArchCPU
  target/ppc: Restrict KVM-specific fields from ArchCPU
  target/arm: Restrict KVM-specific fields from ArchCPU
  hw/arm/sbsa-ref: Include missing 'sysemu/kvm.h' header
  hw/intc/arm_gic: Rename 'first_cpu' argument
  hw/intc/arm_gic: Un-inline GIC*/ITS class_name() helpers
  accel/kvm: Declare kvm_direct_msi_allowed in stubs
  accel/kvm: Re-include "exec/memattrs.h" header
  accel: Rename HVF 'struct hvf_vcpu_state' -> AccelCPUState
  accel: Rename 'cpu_state' -> 'cs'
  accel: Inline WHPX get_whpx_vcpu()
  accel: Rename WHPX 'struct whpx_vcpu' -> AccelCPUState
  accel: Remove WHPX unreachable error path
  accel: Inline NVMM get_qemu_vcpu()
  accel: Rename NVMM 'struct qemu_vcpu' -> AccelCPUState
  accel: Remove NVMM unreachable error path
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

3 files changed, 35 insertions, 2 deletions

diff --git a/hw/intc/arm_gic_common.c b/hw/intc/arm_gic_common.c
index a379cea..7c28504 100644
--- a/hw/intc/arm_gic_common.c
+++ b/hw/intc/arm_gic_common.c
@@ -21,10 +21,12 @@
 #include "qemu/osdep.h"
 #include "qapi/error.h"
 #include "qemu/module.h"
+#include "qemu/error-report.h"
 #include "gic_internal.h"
 #include "hw/arm/linux-boot-if.h"
 #include "hw/qdev-properties.h"
 #include "migration/vmstate.h"
+#include "sysemu/kvm.h"
 
 static int gic_pre_save(void *opaque)
 {
@@ -233,12 +235,12 @@ static void arm_gic_common_realize(DeviceState *dev, Error **errp)
     }
 }
 
-static inline void arm_gic_common_reset_irq_state(GICState *s, int first_cpu,
+static inline void arm_gic_common_reset_irq_state(GICState *s, int cidx,
                                                   int resetprio)
 {
     int i, j;
 
-    for (i = first_cpu; i < first_cpu + s->num_cpu; i++) {
+    for (i = cidx; i < cidx + s->num_cpu; i++) {
         if (s->revision == REV_11MPCORE) {
             s->priority_mask[i] = 0xf0;
         } else {
@@ -393,3 +395,8 @@ static void register_types(void)
 }
 
 type_init(register_types)
+
+const char *gic_class_name(void)
+{
+    return kvm_irqchip_in_kernel() ? "kvm-arm-gic" : "arm_gic";
+}
diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c
index 642a824..2ebf880 100644
--- a/hw/intc/arm_gicv3_common.c
+++ b/hw/intc/arm_gicv3_common.c
@@ -24,6 +24,7 @@
 #include "qemu/osdep.h"
 #include "qapi/error.h"
 #include "qemu/module.h"
+#include "qemu/error-report.h"
 #include "hw/core/cpu.h"
 #include "hw/intc/arm_gicv3_common.h"
 #include "hw/qdev-properties.h"
@@ -608,3 +609,16 @@ static void register_types(void)
 }
 
 type_init(register_types)
+
+const char *gicv3_class_name(void)
+{
+    if (kvm_irqchip_in_kernel()) {
+        return "kvm-arm-gicv3";
+    } else {
+        if (kvm_enabled()) {
+            error_report("Userspace GICv3 is not supported with KVM");
+            exit(1);
+        }
+        return "arm-gicv3";
+    }
+}
diff --git a/hw/intc/arm_gicv3_its_common.c b/hw/intc/arm_gicv3_its_common.c
index d7532a7..abaf770 100644
--- a/hw/intc/arm_gicv3_its_common.c
+++ b/hw/intc/arm_gicv3_its_common.c
@@ -24,6 +24,7 @@
 #include "hw/intc/arm_gicv3_its_common.h"
 #include "qemu/log.h"
 #include "qemu/module.h"
+#include "sysemu/kvm.h"
 
 static int gicv3_its_pre_save(void *opaque)
 {
@@ -158,3 +159,14 @@ static void gicv3_its_common_register_types(void)
 }
 
 type_init(gicv3_its_common_register_types)
+
+const char *its_class_name(void)
+{
+    if (kvm_irqchip_in_kernel()) {
+        /* KVM implementation requires this capability */
+        return kvm_direct_msi_enabled() ? "arm-its-kvm" : NULL;
+    } else {
+        /* Software emulation based model */
+        return "arm-gicv3-its";
+    }
+}