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| author | Frederic Barrat <fbarrat@linux.ibm.com> | 2023-06-01 14:13:27 +0200 |
|---|---|---|
| committer | Daniel Henrique Barboza <danielhb413@gmail.com> | 2023-06-10 10:19:24 -0300 |
| commit | cce84fc9193e2566b4f7f9de5a13e7ed360d44d9 (patch) | |
| tree | a8f93eb089ec75086c1a031542d066df6d2a8dc1 /hw/intc/pnv_xive2_regs.h | |
| parent | 3673ad389622d9ef4d2743101253c642def7935a (diff) | |
| download | qemu-cce84fc9193e2566b4f7f9de5a13e7ed360d44d9.zip qemu-cce84fc9193e2566b4f7f9de5a13e7ed360d44d9.tar.gz qemu-cce84fc9193e2566b4f7f9de5a13e7ed360d44d9.tar.bz2 | |
pnv/xive2: Add definition for TCTXT Config register
Add basic read/write support for the TCTXT Config register on P10. qemu
doesn't do anything with it yet, but it avoids logging a guest error
when skiboot configures the fused-core state:
qemu-system-ppc64 -machine powernv10 ... -d guest_errors
...
[ 0.131670000,5] XIVE: [ IC 00 ] Initializing XIVE block ID 0...
XIVE[0] - TCTXT: invalid read @140
XIVE[0] - TCTXT: invalid write @140
Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20230601121331.487207-2-fbarrat@linux.ibm.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'hw/intc/pnv_xive2_regs.h')
| -rw-r--r-- | hw/intc/pnv_xive2_regs.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/hw/intc/pnv_xive2_regs.h b/hw/intc/pnv_xive2_regs.h index 0c096e4..8f1e0a1 100644 --- a/hw/intc/pnv_xive2_regs.h +++ b/hw/intc/pnv_xive2_regs.h @@ -405,6 +405,10 @@ #define X_TCTXT_EN1_RESET 0x307 #define TCTXT_EN1_RESET 0x038 +/* TCTXT Config register */ +#define X_TCTXT_CFG 0x328 +#define TCTXT_CFG 0x140 + /* * VSD Tables */ |