diff options
author | Wilfred Mallawa <wilfred.mallawa@wdc.com> | 2022-01-11 17:10:24 +1000 |
---|---|---|
committer | Alistair Francis <alistair.francis@wdc.com> | 2022-01-21 15:52:56 +1000 |
commit | 0df470c3886eda19afdbd5ccd5550ce794feef7b (patch) | |
tree | 210676f4419a77743bac17a6f30a4152f4ce2d1d /hw/intc/arm_gicv3_cpuif.c | |
parent | 28ca4689ae94a27a6a337546425cda30d0e885c3 (diff) | |
download | qemu-0df470c3886eda19afdbd5ccd5550ce794feef7b.zip qemu-0df470c3886eda19afdbd5ccd5550ce794feef7b.tar.gz qemu-0df470c3886eda19afdbd5ccd5550ce794feef7b.tar.bz2 |
riscv: opentitan: fixup plic stride len
The following change was made to rectify incorrectly set stride length
on the PLIC [1]. Where it should be 32bit and not 24bit (0x18). This was
discovered whilst attempting to fix a bug where a timer_interrupt was
not serviced on TockOS-OpenTitan.
[1] https://docs.opentitan.org/hw/top_earlgrey/ip_autogen/rv_plic/doc/
Signed-off-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Tested-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id: 20220111071025.4169189-1-alistair.francis@opensource.wdc.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/intc/arm_gicv3_cpuif.c')
0 files changed, 0 insertions, 0 deletions